Does the CPU busfault if write the GPIOI MODER? Do the values stick when written?
-----Original Message----- From: Michael Jung <mij...@gmx.net> Sent: Friday, March 25, 2022 9:36 AM To: dev <dev@nuttx.apache.org> Subject: Re: STM32U585: Can't enable peripheral clock for IO port I (GPIOIEN in RCC_AHB2ENR1) Hi David, Thanks for your reply. Actually, I am trying to get the B-U585I-IOT02A's NOR flash chip running, which is connected via OCTOSPI. I can issue a single command (READID) to the NOR flash and I get a sane reply, but any follow-on command will just return nonsense (more specifically, the READID reply will be returned over and over again). This seemed to point to problems with the nCS signal, which turned out to be on PI5. I then realized via JTAG/SVD that GPIOIEN is not set. Single stepping through the code I see that the value 0x802001ff is written to RCC_AHB2ENR1, but reading back the register returns 0x802000ff. The stm32l5, which I based the stm32u5 code on, did not have an IO port I. I must have missed a piece of logic during porting I guess. Bye, Michael Am Fr., 25. März 2022 um 17:22 Uhr schrieb David Sidrane < david.sidr...@nscdg.com>: > Hi Michael, > > Odd. Did you check the defines? How are you verifying it? Have you > JTAG-ed it, could it be bad SVD? Have you just printed the value to be > set and the result ? > > David > > -----Original Message----- > From: Michael Jung <mij...@gmx.net> > Sent: Friday, March 25, 2022 9:07 AM > To: dev <dev@nuttx.apache.org> > Subject: STM32U585: Can't enable peripheral clock for IO port I > (GPIOIEN in > RCC_AHB2ENR1) > > Hello, > > This is more about STM32 than it is about NuttX, but I know there are > experts here: STM32U585 does have 8 GPIOs on Port I. However, > setting bit > 8 (GPIOIEN) in RCC_AHB2ENR1 seems to be ignored (i.e. GPIOIEN remains > at 0). > For the other eight IO ports (GPIO[A-H]EN) it works just fine. Any > ideas anyone? > > Thanks! > Michael >
