Hi Tim, Please find the following code in arch/arm/src/armv7-a/arm_head.S. The ICache and DCache will be enabled by default. #undef CPU_DCACHE_DISABLE #undef CPU_ICACHE_DISABLE
#if !defined(CPU_DCACHE_DISABLE) && !defined(CONFIG_SMP) /* Dcache enable * * SCTLR_C Bit 2: DCache enable */ orr r0, r0, #(SCTLR_C) #endif #ifndef CPU_ICACHE_DISABLE /* Icache enable * * SCTLR_I Bit 12: ICache enable */ orr r0, r0, #(SCTLR_I) #endif Best Rds On Tue, Sep 13, 2022 at 10:05 PM TimH <t...@jti.uk.com.invalid> wrote: > I found that the up_enable_dcache function is there, with a call to > cp15_enable_dcache, yes; and that function is in my system.map. But > nothing calls it that I can find? > > >-----Original Message----- > >From: Alan Carvalho de Assis <acas...@gmail.com> > >Sent: 13 September 2022 15:01 > > > >I don't know about sama5, but probably it is done here: > arch/arm/src/armv7- > >a/ > > > >On 9/13/22, TimH <t...@jti.uk.com.invalid> wrote: > >> I will probably hit send then find it.but, right now, I can't see if > >> there's anything I need to do to enable DCACHE? > >> > >> > >> > >> My .config has CONFIG_ARCH_DCACHE set, and that seems to "enable" all > >> the various cache functions, including up_enable_dcache, but I can't > >> find any calls to that function in sama5 related code. > >> > >> > >> > >> Any clues appreciated!! > >> > >> > >> > >> > >
