Hi all, I have been bughunting an issue with https://github.com/apache/nuttx/pull/9577 which implements (again) lazy FPU save and restore for risc-v. It crashes with SMP targets randomly.
I have been looking at the SMP implementation of NuttX for a while now trying to understand what can cause such random behavior, specifically I have been trying to understand what up_cpu_paused does. It saves the integer registers and then waits for a spin lock to be released. I assume the task that was scheduled out can be scheduled on another CPU while the waiting CPU waits. So my question is, should I do a full context save in up_cpu_paused ? Meaning integer + FPU registers both ? Now it only saves the integer registers which I think is the issue here. Any insight on this is greatly appreciated! Br, Ville Juven
