Lwazi,
My bad, but you could build Nuttx for armv7-a and disassemble its vector
table to figure it out.
Try configuring Nuttx for qemu-armv7a:nsh and build the image. Then
using addr2line you can determine where the source for the vector table
is via "addr2line -e nuttx 0x0" which returns
"nuttx/arch/arm/src/armv7-a/arm_vectgortab.S:66". Looking in
arm_vectortab.S shows _vector_start table which contains eight "ldr PC,
<sym>" instructions(each assembling to 0xe59ff018 in my case) where
<sym> contains the address to vector to. In this case the first entry
jumps indirect of .Lresethandler to __start. From the symbol table you
can find the value of __start (0x2e0 in my image) and from that find the
source e.g. "addr2line -e nuttx 0x2e0" which points to
"/home/peter/git/nuttx/nuttx-master/nuttx/arch/arm/src/armv7-a/arm_head.S:220".
__start in arm_head.S you'll see code that does some initialization(to
enambe MMU, etc) and jumps to .Lvstart where it setups the stack pointer
to IDLE_STACK_TOP indirect from .Lstackpointer (IDLE_STACK_TOP).
Hope this helps!
On 2/11/25 22:50, Lwazi Dube wrote:
On Tue, 11 Feb 2025 at 18:59, Peter Barada <peter.bar...@gmail.com> wrote:
Tim,
Common across bulk of ARM processors, the vector table starting at
address 0x0 contains the 32-bit value of the stack pointer, address 0x4
contains the reset vector (i.e. where to start execution in supervisor
state) and then the exception and IRQ vectors.
Only for cortex-m. Not true for armv7a and older.
--
Peter Barada
peter.bar...@gmail.com
