Hello all, This email is a result of: https://github.com/apache/nuttx/issues/16248
I am working on adding support for DMA on the STM32H5 architecture. The H5 uses the GPDMA peripheral, which is quite different in function and programming interaction than other STM DMA peripherals (see end of email). I opened the GitHub issue and am sending this ticket to get feedback on what solution would fit best in NuttX. So far, there are two main directions I have considered: First: Give full control over channel registers for configuration. - Pros: Flexibility and simpler DMA driver implementation. - Cons: Added complexity when using the driver in other architecture files. For example, ADC driver would need to allocate a full linked list item in memory to do a circular DMA transfer. Second: Abstract away registers by using a 'behavior' configuration to define desired behavior of the DMA transfer. - Pros: Interface similar to current DMA implementations. Simpler usage from other drivers (e.g. ADC driver tells DMA 'use circular' and the DMA driver handles linked list item allocation and configuration) - Cons: Less flexible and more complex DMA driver implementation. DMA driver may require future work if a peripheral needs more advanced features such as 2D addressing or in-transit data manipulation. For those that are not familiar with the STM GPDMA peripheral, it utilizes linked-list data structures programmed into memory to configure most DMA behavior (i.e. anything beyond a simple one-shot transfer). The peripheral IP is shared between the STM32H5, STM32H7Rx/7Sx, STM32U5, and STM32U3. It appears to be a relatively new IP, and therefore documentation is mediocre compared to more mature implementations like the F0, F7, H7, etc. architectures. *Tyler Bennett*
