Dear NuttX developers, I work with our Kinetis MK60FN1M0VLQ12 chip-based board. We have quite important peripherals connected via SPI (LCD, SD card), so we need SPI to work well in the SPI Master mode.
K60 Reference Manual (K60P144M150SF3RM.pdf) states that 8- or 16-bit write access to the PUSHR transfers all 32 bits to the TX FIFO (53.3.7). My observation is that 8-bit 0xff (or 16-bit 0xffff) write to the PUSHR results in 0xfcffffff in the TX FIFO (these two 0 are reserved in the PUSHR; read to PUSHR returns topmost TX FIFO.) In the SPI Master mode, top 16 bits are command information (different timing and frame size given by CTAS, which periphery to assert given by PCS) and low 16 bits are used for data. The unfortunate thing is that when sending data in the kinetis_spi.c's spi_writeword procedure, we use spi_putreg16, effectively re-using data as command information. I would like to ask if anyone else can confirm this behavior? Thank you, jiri
