Dear NuttX Community, I hope this email finds you well.
My name is JingYue LIAO (廖竞越), an undergraduate student majoring in Communication Engineering at Southwest Jiaotong University, China. I am writing to announce the completion of an initial Board Support Package (BSP) for the N32H762IIL7 ARM Cortex-M7 MCU (600MHz, 1.5MB SRAM, 2MB Flash), developed by Nations Technologies (国民技术). This chip has been commercially available, and I believe this contribution will provide NuttX with support for a cost-effective and high-performance MCU option in the Chinese market. This is a full, from-scratch port based solely on the manufacturer's reference manual (TRM). I have not used any proprietary SDK code to ensure legal compliance. Key Features of the Port: Architecture: ARM Cortex-M7 (Armv7E-M) with FPU and MPU support. Core Modules: Complete low-level initialization, interrupt management (NVIC), clock configuration (RCC), and memory mapping (DTCM/AXI-SRAM/AHB-SRAM). Basic Drivers: GPIO, EXTI, RCC, UART (console), TIM (timer, oneshot, PWM, tickless), DMA, UID, and more. Toolchain: Verified with both GCC (ARM GNU Toolchain 15+) and Clang (ATfE 19+). Build System: Supports both the legacy Makefile and the modern CMake/Ninja build systems. Board Support: Currently supports the official n32h762iil7 development board. Application: Currently supports the NSH console (tested and verified on hardware). The total contribution consists of ~38,000 lines of code (net increment), including chip-level (arch/arm/src/n32h7) and board-level (boards/arm/n32h7) support. The code has been compiled with zero warnings and has passed basic hardware validation. Regarding Licensing and Permissions: Since this is a clean-room implementation, I confirm that all code is my original work and is submitted under the Apache License 2.0. I would also like to inquire whether the community requires any additional legal documentation from the chip manufacturer (Nations Technologies), given that the port relies on hardware register definitions which are determined by the chip architecture. Next Steps: I plan to submit the PR to the main branch within the next week. Before that, I would appreciate any early feedback on the code structure or any concerns regarding the development and maintainability of the N32H7 series. If you have concerns about the large size of the single commit, I am willing to split it into smaller, logical patches as per the community's guidelines. Thank you for your time and for reviewing this submission. I look forward to your feedback. Best regards, Felix LIAO (JingYue LIAO) Southwest Jiaotong University GitHub: Felix-LJY
