Update the DT description of the second SPI controller with the TX,
RX and fault interrupt lines as they are assigned on SynQuacer.
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi
b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi
index 8559b5b329a7..f124a223816f 100644
--- a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi
+++ b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi
@@ -545,6 +545,9 @@
spi: spi@54810000 {
compatible = "socionext,synquacer-spi";
reg = <0x0 0x54810000 0x0 0x1000>;
+ interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_alw_1_8>;
clock-names = "iHCLK";
socionext,use-rtm;
--
2.20.1
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