REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1883
Add header file for FSP_TEMP_RAM_EXIT_PPI which is
defined by FSP 2.1 spec.
Test: Build successfully.
Cc: Nate DeSimone <nathaniel.l.desim...@intel.com>
Cc: Star Zeng <star.z...@intel.com>
Signed-off-by: Chasel Chiu <chasel.c...@intel.com>
---
IntelFsp2Pkg/Include/Ppi/TempRamExitPpi.h | 50
++++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 50 insertions(+)
diff --git a/IntelFsp2Pkg/Include/Ppi/TempRamExitPpi.h
b/IntelFsp2Pkg/Include/Ppi/TempRamExitPpi.h
new file mode 100644
index 0000000000..9e728a5d4d
--- /dev/null
+++ b/IntelFsp2Pkg/Include/Ppi/TempRamExitPpi.h
@@ -0,0 +1,50 @@
+/** @file
+ This file defines the Silicon Temp Ram Exit PPI which implements the
+ required programming steps for disabling temporary memory.
+
+Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _FSP_TEMP_RAM_EXIT_PPI_H_
+#define _FSP_TEMP_RAM_EXIT_PPI_H_
+
+///
+/// Global ID for the FSP_TEMP_RAM_EXIT_PPI.
+///
+#define FSP_TEMP_RAM_EXIT_GUID \
+ { \
+ 0xbc1cfbdb, 0x7e50, 0x42be, { 0xb4, 0x87, 0x22, 0xe0, 0xa9, 0x0c, 0xb0,
0x52 } \
+ }
+
+//
+// Forward declaration for the FSP_TEMP_RAM_EXIT_PPI.
+//
+typedef struct _FSP_TEMP_RAM_EXIT_PPI FSP_TEMP_RAM_EXIT_PPI;
+
+/**
+ Silicon function for disabling temporary memory.
+ @param[in] TempRamExitParamPtr - Pointer to the TempRamExit parameters
structure.
+ This structure is normally defined in the
Integration
+ Guide. If it is not defined in the
Integration Guide,
+ pass NULL.
+ @retval EFI_SUCCESS - Execution was completed successfully.
+ @retval Status - Error status reported by sub-functions if
implemented.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *FSP_TEMP_RAM_EXIT) (
+ IN VOID *TempRamExitParamPtr
+ );
+
+///
+/// This PPI provides function to disable temporary memory.
+///
+struct _FSP_TEMP_RAM_EXIT_PPI {
+ FSP_TEMP_RAM_EXIT TempRamExit;
+};
+
+extern EFI_GUID gFspTempRamExitPpiGuid;
+
+#endif // _FSP_TEMP_RAM_EXIT_PPI_H_
--
2.13.3.windows.1
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