On Thu, Aug 15, 2019 at 04:54:10AM +0200, Marcin Wojtas wrote: > Hitherto MppLib code assumed that there could be only two > Xenon SdMmc controllers' PHYs. Remove this limitation, so that to > support CN913x SoCs, which may have up to 4 of such interfaces.
Should this be merged with the preceding patch? / Leif > Signed-off-by: Marcin Wojtas <m...@semihalf.com> > --- > Silicon/Marvell/Library/MppLib/MppLib.c | 4 +--- > 1 file changed, 1 insertion(+), 3 deletions(-) > > diff --git a/Silicon/Marvell/Library/MppLib/MppLib.c > b/Silicon/Marvell/Library/MppLib/MppLib.c > index 40d9077..f20668d 100644 > --- a/Silicon/Marvell/Library/MppLib/MppLib.c > +++ b/Silicon/Marvell/Library/MppLib/MppLib.c > @@ -139,11 +139,9 @@ SetSdMmcPhyMpp ( > case 0: > Offset = SD_MMC_PHY_AP_MPP_OFFSET; > break; > - case 1: > + default: > Offset = SD_MMC_PHY_CP0_MPP_OFFSET; > break; > - default: > - return; > } > > /* > -- > 2.7.4 > > > > -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#45840): https://edk2.groups.io/g/devel/message/45840 Mute This Topic: https://groups.io/mt/32882738/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-