Reviewed-by: Guomin Jiang <[email protected]> > -----Original Message----- > From: [email protected] <[email protected]> On Behalf Of Michael > Kubacki > Sent: Friday, April 10, 2020 4:05 AM > To: [email protected] > Cc: Bi, Dandan <[email protected]>; Wu, Hao A <[email protected]>; > Wang, Jian J <[email protected]>; Gao, Liming <[email protected]>; > Ni, Ray <[email protected]>; Sean Brogan <[email protected]> > Subject: [edk2-devel] [PATCH v1 4/7] MdeModulePkg/XhciDxe: Use BaseLib > linked list iteration macros > > From: Michael Kubacki <[email protected]> > > REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1959 > > Replaces usage of the linked list iteration macros defined in Xhci.h with the > common definition in BaseLib.h. > > Cc: Dandan Bi <[email protected]> > Cc: Hao A Wu <[email protected]> > Cc: Jian J Wang <[email protected]> > Cc: Liming Gao <[email protected]> > Cc: Ray Ni <[email protected]> > Cc: Sean Brogan <[email protected]> > Signed-off-by: Michael Kubacki <[email protected]> > --- > MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c | 9 +++++---- > MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h | 9 +-------- > 2 files changed, 6 insertions(+), 12 deletions(-) > > diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c > b/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c > index c0c374fc4758..ab8957c546ee 100644 > --- a/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c > +++ b/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c > @@ -3,6 +3,7 @@ > XHCI transfer scheduling routines. > > Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR> > +Copyright (c) Microsoft Corporation.<BR> > SPDX-License-Identifier: BSD-2-Clause-Patent > > **/ > @@ -1051,7 +1052,7 @@ IsAsyncIntTrb ( > LIST_ENTRY *Next; > URB *CheckedUrb; > > - EFI_LIST_FOR_EACH_SAFE (Entry, Next, &Xhc->AsyncIntTransfers) { > + BASE_LIST_FOR_EACH_SAFE (Entry, Next, &Xhc->AsyncIntTransfers) { > CheckedUrb = EFI_LIST_CONTAINER (Entry, URB, UrbList); > if (IsTransferRingTrb (Xhc, Trb, CheckedUrb)) { > *Urb = CheckedUrb; > @@ -1346,7 +1347,7 @@ XhciDelAsyncIntTransfer ( > > Urb = NULL; > > - EFI_LIST_FOR_EACH_SAFE (Entry, Next, &Xhc->AsyncIntTransfers) { > + BASE_LIST_FOR_EACH_SAFE (Entry, Next, &Xhc->AsyncIntTransfers) { > Urb = EFI_LIST_CONTAINER (Entry, URB, UrbList); > if ((Urb->Ep.BusAddr == BusAddr) && > (Urb->Ep.EpAddr == EpNum) && > @@ -1386,7 +1387,7 @@ XhciDelAllAsyncIntTransfers ( > URB *Urb; > EFI_STATUS Status; > > - EFI_LIST_FOR_EACH_SAFE (Entry, Next, &Xhc->AsyncIntTransfers) { > + BASE_LIST_FOR_EACH_SAFE (Entry, Next, &Xhc->AsyncIntTransfers) { > Urb = EFI_LIST_CONTAINER (Entry, URB, UrbList); > > // > @@ -1578,7 +1579,7 @@ XhcMonitorAsyncRequests ( > > Xhc = (USB_XHCI_INSTANCE*) Context; > > - EFI_LIST_FOR_EACH_SAFE (Entry, Next, &Xhc->AsyncIntTransfers) { > + BASE_LIST_FOR_EACH_SAFE (Entry, Next, &Xhc->AsyncIntTransfers) { > Urb = EFI_LIST_CONTAINER (Entry, URB, UrbList); > > // > diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h > b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h > index 72b4e084f14d..3285eb8798c0 100644 > --- a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h > +++ b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h > @@ -3,6 +3,7 @@ > Provides some data structure definitions used by the XHCI host controller > driver. > > Copyright (c) 2011 - 2017, Intel Corporation. All rights reserved.<BR> > +Copyright (c) Microsoft Corporation.<BR> > SPDX-License-Identifier: BSD-2-Clause-Patent > > **/ > @@ -82,14 +83,6 @@ typedef struct _USB_DEV_CONTEXT > USB_DEV_CONTEXT; > #define INT_INTER 3 > #define INT_INTER_ASYNC 4 > > -// > -// Iterate through the double linked list. This is delete-safe. > -// Don't touch NextEntry > -// > -#define EFI_LIST_FOR_EACH_SAFE(Entry, NextEntry, ListHead) \ > - for (Entry = (ListHead)->ForwardLink, NextEntry = Entry->ForwardLink;\ > - Entry != (ListHead); Entry = NextEntry, NextEntry = Entry->ForwardLink) > - > #define EFI_LIST_CONTAINER(Entry, Type, Field) BASE_CR(Entry, Type, Field) > > #define XHC_LOW_32BIT(Addr64) ((UINT32)(((UINTN)(Addr64)) & > 0xFFFFFFFF)) > -- > 2.16.3.windows.1 > > >
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