BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2971
This patch is to fix a issue that "-A" option would only support
2^n Byte alignment of microcode.
Signed-off-by: Aaron Li <aaron...@intel.com>
Cc: Bob Feng <bob.c.f...@intel.com>
Cc: Liming Gao <gaolim...@byosoft.com.cn>
---
Silicon/Intel/Tools/FitGen/FitGen.c | 2 +-
Silicon/Intel/Tools/FitGen/FitGen.h | 4 +++-
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/Silicon/Intel/Tools/FitGen/FitGen.c
b/Silicon/Intel/Tools/FitGen/FitGen.c
index c4006e69c822..4caaf70ee018 100644
--- a/Silicon/Intel/Tools/FitGen/FitGen.c
+++ b/Silicon/Intel/Tools/FitGen/FitGen.c
@@ -1176,7 +1176,7 @@ Returns:
// MCU might be put at 2KB alignment, if so, we need to adjust
the size as 2KB alignment.
//
if (gFitTableContext.MicrocodeIsAligned) {
- MicrocodeSize = (*(UINT32 *)(MicrocodeBuffer + 32) +
(gFitTableContext.MicrocodeAlignValue - 1)) &
~(gFitTableContext.MicrocodeAlignValue - 1);
+ MicrocodeSize = ROUNDUP (*(UINT32 *)(MicrocodeBuffer + 32),
gFitTableContext.MicrocodeAlignValue);
} else {
MicrocodeSize = (*(UINT32 *)(MicrocodeBuffer + 32));
}
diff --git a/Silicon/Intel/Tools/FitGen/FitGen.h
b/Silicon/Intel/Tools/FitGen/FitGen.h
index abad2d8799c8..435fc26209da 100644
--- a/Silicon/Intel/Tools/FitGen/FitGen.h
+++ b/Silicon/Intel/Tools/FitGen/FitGen.h
@@ -31,7 +31,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
// Utility version information
//
#define UTILITY_MAJOR_VERSION 0
-#define UTILITY_MINOR_VERSION 62
+#define UTILITY_MINOR_VERSION 63
#define UTILITY_DATE __DATE__
//
@@ -45,4 +45,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
(ActualSize) + (((Alignment) - ((ActualSize) & ((Alignment) - 1))) &
((Alignment) - 1))
;
+#define ROUNDUP(Size, Alignment) (((Size) + (Alignment) - 1) / (Alignment) *
(Alignment))
+
#endif
--
2.23.0.windows.1
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