Reviewed-by: Nate DeSimone <nathaniel.l.desim...@intel.com> > -----Original Message----- > From: Luo, Heng <heng....@intel.com> > Sent: Sunday, January 31, 2021 5:37 PM > To: devel@edk2.groups.io > Cc: Chaganty, Rangasai V <rangasai.v.chaga...@intel.com>; Desimone, > Nathaniel L <nathaniel.l.desim...@intel.com> > Subject: [PATCH 33/40] TigerlakeSiliconPkg/Pch: Add Pch private library > instances > > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3171 > > Adds the following files: > * Pch/LibraryPrivate/BaseSiScheduleResetLib > * Pch/LibraryPrivate/SmmPchPrivateLib > > Cc: Sai Chaganty <rangasai.v.chaga...@intel.com> > Cc: Nate DeSimone <nathaniel.l.desim...@intel.com> > Signed-off-by: Heng Luo <heng....@intel.com> > --- > > Silicon/Intel/TigerlakeSiliconPkg/Pch/LibraryPrivate/BaseSiScheduleResetLib/ > BaseSiScheduleResetLib.c | 171 > ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++ > > Silicon/Intel/TigerlakeSiliconPkg/Pch/LibraryPrivate/BaseSiScheduleResetLib/ > BaseSiScheduleResetLib.inf | 37 > +++++++++++++++++++++++++++++++++++++ > > Silicon/Intel/TigerlakeSiliconPkg/Pch/LibraryPrivate/SmmPchPrivateLib/Smm > PchPrivateLib.c | 57 > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > > Silicon/Intel/TigerlakeSiliconPkg/Pch/LibraryPrivate/SmmPchPrivateLib/Smm > PchPrivateLib.inf | 31 +++++++++++++++++++++++++++++++ > 4 files changed, 296 insertions(+) > > diff --git > a/Silicon/Intel/TigerlakeSiliconPkg/Pch/LibraryPrivate/BaseSiScheduleResetLi > b/BaseSiScheduleResetLib.c > b/Silicon/Intel/TigerlakeSiliconPkg/Pch/LibraryPrivate/BaseSiScheduleResetLi > b/BaseSiScheduleResetLib.c > new file mode 100644 > index 0000000000..1880244a01 > --- /dev/null > +++ > b/Silicon/Intel/TigerlakeSiliconPkg/Pch/LibraryPrivate/BaseSiScheduleResetLi > b/BaseSiScheduleResetLib.c > @@ -0,0 +1,171 @@ > +/** @file > > + Reset scheduling library services > > + > > + Copyright (c) 2021, Intel Corporation. All rights reserved.<BR> > > + SPDX-License-Identifier: BSD-2-Clause-Patent > > +**/ > > +#include <Library/DebugLib.h> > > +#include <Library/ResetSystemLib.h> > > +#include <Uefi/UefiBaseType.h> > > +#include <Uefi.h> > > +#include <Pi/PiMultiPhase.h> > > +#include <Library/HobLib.h> > > +#include <PchResetPlatformSpecific.h> > > +#include <Library/SiScheduleResetLib.h> > > +#include <SiScheduleResetHob.h> > > + > > +/** > > + This function returns SiScheduleResetHob for library use > > +**/ > > +STATIC > > +SI_SCHEDULE_RESET_HOB * > > +SiScheduleGetResetData ( > > + VOID > > + ) > > +{ > > + STATIC SI_SCHEDULE_RESET_HOB *SiScheduleResetHob = NULL; > > + SI_SCHEDULE_RESET_HOB *SiScheduleResetHobTemp; > > + VOID *HobPtr; > > + > > + if (SiScheduleResetHob != NULL) { > > + return SiScheduleResetHob; > > + } > > + > > + HobPtr = GetFirstGuidHob (&gSiScheduleResetHobGuid); > > + if (HobPtr == NULL) { > > + SiScheduleResetHobTemp = BuildGuidHob (&gSiScheduleResetHobGuid, > sizeof (SI_SCHEDULE_RESET_HOB)); > > + if (SiScheduleResetHobTemp == NULL) { > > + ASSERT (FALSE); > > + return SiScheduleResetHobTemp; > > + } > > + SiScheduleResetHobTemp->ResetType = 0xFF; > > + DEBUG ((DEBUG_INFO, "SiScheduleResetSetType : Init > SiScheduleResetHob\n")); > > + } else { > > + SiScheduleResetHobTemp = (SI_SCHEDULE_RESET_HOB*) > GET_GUID_HOB_DATA (HobPtr); > > + } > > + SiScheduleResetHob = SiScheduleResetHobTemp; > > + return SiScheduleResetHobTemp; > > +} > > + > > +/** > > + This function updates the reset information in SiScheduleResetHob > > + @param[in] ResetType UEFI defined reset type. > > + @param[in] ResetData Optional element used to introduce a platform > specific reset. > > + The exact type of the reset is defined by the > EFI_GUID that > follows > > + the Null-terminated Unicode string. > > +**/ > > +VOID > > +SiScheduleResetSetType ( > > + IN EFI_RESET_TYPE ResetType, > > + IN PCH_RESET_DATA *ResetData OPTIONAL > > + ) > > +{ > > + SI_SCHEDULE_RESET_HOB *SiScheduleResetHob; > > + if (ResetType > EfiResetPlatformSpecific) { > > + DEBUG ((DEBUG_INFO, "Unsupported Reset Type Requested\n")); > > + return; > > + } > > + SiScheduleResetHob = SiScheduleGetResetData (); > > + if (SiScheduleResetHob == NULL) { > > + return; > > + } > > + DEBUG ((DEBUG_INFO, "SiScheduleResetSetType : Current Reset Type = > 0x%x\n", SiScheduleResetHob->ResetType)); > > + if (SiScheduleResetHob->ResetType == ResetType) { > > + DEBUG ((DEBUG_INFO, "Current Reset Type is same as requested Reset > Type\n")); > > + return; > > + } > > + if (SiScheduleResetHob->ResetType == 0xFF) { > > + // Init Reset Type to lowest ResetType > > + SiScheduleResetHob->ResetType = EfiResetWarm; > > + } > > + // > > + // ResetType Priority set as : ResetPlatformSpecific(3) > ResetShutdown(2) > > ResetCold(0) > ResetWarm(1) > > + // > > + switch (ResetType) { > > + case EfiResetWarm: > > + break; > > + > > + case EfiResetCold: > > + if (SiScheduleResetHob->ResetType == EfiResetWarm) { > > + SiScheduleResetHob->ResetType = ResetType; > > + } > > + break; > > + > > + case EfiResetShutdown: > > + if (SiScheduleResetHob->ResetType < ResetType) > > + SiScheduleResetHob->ResetType = ResetType; > > + break; > > + > > + case EfiResetPlatformSpecific: > > + SiScheduleResetHob->ResetType = ResetType; > > + SiScheduleResetHob->ResetData = *ResetData; > > + break; > > + } > > + DEBUG ((DEBUG_INFO, "SiScheduleResetSetType : New Reset Type = > 0x%x\n", SiScheduleResetHob->ResetType)); > > +} > > + > > +/** > > + This function returns TRUE or FALSE depending on whether a reset is > required based on SiScheduleResetHob > > + > > + @retval BOOLEAN The function returns FALSE if no reset is > required > > +**/ > > +BOOLEAN > > +SiScheduleResetIsRequired ( > > + VOID > > + ) > > +{ > > + VOID *HobPtr; > > + > > + HobPtr = NULL; > > + HobPtr = GetFirstGuidHob (&gSiScheduleResetHobGuid); > > + if (HobPtr == NULL) { > > + return FALSE; > > + } > > + return TRUE; > > +} > > + > > +/** > > + This function performs reset based on SiScheduleResetHob > > + > > + @retval BOOLEAN The function returns FALSE if no reset is > required > > +**/ > > +BOOLEAN > > +SiScheduleResetPerformReset ( > > + VOID > > + ) > > +{ > > + UINTN DataSize; > > + SI_SCHEDULE_RESET_HOB *SiScheduleResetHob; > > + > > + if (!SiScheduleResetIsRequired ()) { > > + return FALSE; > > + } > > + SiScheduleResetHob = SiScheduleGetResetData (); > > + > > + if (SiScheduleResetHob == NULL) { > > + return TRUE; > > + } > > + > > + DEBUG ((DEBUG_INFO, "SiScheduleResetPerformReset : Reset Type = > 0x%x\n", SiScheduleResetHob->ResetType)); > > + switch (SiScheduleResetHob->ResetType) { > > + case EfiResetWarm: > > + ResetWarm (); > > + break; > > + > > + case EfiResetCold: > > + ResetCold (); > > + break; > > + > > + case EfiResetShutdown: > > + ResetShutdown (); > > + break; > > + > > + case EfiResetPlatformSpecific: > > + DataSize = sizeof (PCH_RESET_DATA); > > + ResetPlatformSpecific (DataSize, &SiScheduleResetHob->ResetData); > > + break; > > + } > > + // Code should never reach here > > + ASSERT (FALSE); > > + return TRUE; > > +} > > diff --git > a/Silicon/Intel/TigerlakeSiliconPkg/Pch/LibraryPrivate/BaseSiScheduleResetLi > b/BaseSiScheduleResetLib.inf > b/Silicon/Intel/TigerlakeSiliconPkg/Pch/LibraryPrivate/BaseSiScheduleResetLi > b/BaseSiScheduleResetLib.inf > new file mode 100644 > index 0000000000..4363a752a9 > --- /dev/null > +++ > b/Silicon/Intel/TigerlakeSiliconPkg/Pch/LibraryPrivate/BaseSiScheduleResetLi > b/BaseSiScheduleResetLib.inf > @@ -0,0 +1,37 @@ > +## @file > > +# Component description file for Si Reset Schedule Library. > > +# > > +# Copyright (c) 2021, Intel Corporation. All rights reserved.<BR> > > +# SPDX-License-Identifier: BSD-2-Clause-Patent > > +# > > +## > > + > > +[Defines] > > +INF_VERSION = 0x00010017 > > +BASE_NAME = BaseSiScheduleResetLib > > +FILE_GUID = E6F3D551-36C0-4737-80C7-47FC57593163 > > +VERSION_STRING = 1.0 > > +MODULE_TYPE = BASE > > +LIBRARY_CLASS = SiScheduleResetLib > > +# > > +# The following information is for reference only and not required by the > build tools. > > +# > > +# VALID_ARCHITECTURES = IA32 X64 IPF > > +# > > + > > +[LibraryClasses] > > +BaseLib > > +IoLib > > +DebugLib > > +HobLib > > +ResetSystemLib > > + > > +[Packages] > > +MdePkg/MdePkg.dec > > +TigerlakeSiliconPkg/SiPkg.dec > > + > > +[Guids] > > +gSiScheduleResetHobGuid > > + > > +[Sources] > > +BaseSiScheduleResetLib.c > > diff --git > a/Silicon/Intel/TigerlakeSiliconPkg/Pch/LibraryPrivate/SmmPchPrivateLib/Sm > mPchPrivateLib.c > b/Silicon/Intel/TigerlakeSiliconPkg/Pch/LibraryPrivate/SmmPchPrivateLib/Sm > mPchPrivateLib.c > new file mode 100644 > index 0000000000..46cf735860 > --- /dev/null > +++ > b/Silicon/Intel/TigerlakeSiliconPkg/Pch/LibraryPrivate/SmmPchPrivateLib/Sm > mPchPrivateLib.c > @@ -0,0 +1,57 @@ > +/** @file > > + PCH SMM private lib. > > + > > + Copyright (c) 2021, Intel Corporation. All rights reserved.<BR> > > + SPDX-License-Identifier: BSD-2-Clause-Patent > > +**/ > > + > > +#include <Uefi/UefiBaseType.h> > > +#include <Library/BaseLib.h> > > +#include <Library/IoLib.h> > > +#include <Library/DebugLib.h> > > +#include <Register/CommonMsr.h> > > + > > +/** > > + Set InSmm.Sts bit > > +**/ > > +VOID > > +PchSetInSmmSts ( > > + VOID > > + ) > > +{ > > + UINT32 Data32; > > + > > + > > + /// > > + /// Read memory location FED30880h OR with 00000001h, place the result > in EAX, > > + /// and write data to lower 32 bits of MSR 1FEh (sample code available) > > + /// > > + Data32 = MmioRead32 (0xFED30880); > > + AsmWriteMsr32 (MSR_SPCL_CHIPSET_USAGE, Data32 | BIT0); > > + /// > > + /// Read FED30880h back to ensure the setting went through. > > + /// > > + Data32 = MmioRead32 (0xFED30880); > > +} > > + > > +/** > > + Clear InSmm.Sts bit > > +**/ > > +VOID > > +PchClearInSmmSts ( > > + VOID > > + ) > > +{ > > + UINT32 Data32; > > + > > + /// > > + /// Read memory location FED30880h AND with FFFFFFFEh, place the result > in EAX, > > + /// and write data to lower 32 bits of MSR 1FEh (sample code available) > > + /// > > + Data32 = MmioRead32 (0xFED30880); > > + AsmWriteMsr32 (MSR_SPCL_CHIPSET_USAGE, Data32 & (UINT32) > (~BIT0)); > > + /// > > + /// Read FED30880h back to ensure the setting went through. > > + /// > > + Data32 = MmioRead32 (0xFED30880); > > +} > > diff --git > a/Silicon/Intel/TigerlakeSiliconPkg/Pch/LibraryPrivate/SmmPchPrivateLib/Sm > mPchPrivateLib.inf > b/Silicon/Intel/TigerlakeSiliconPkg/Pch/LibraryPrivate/SmmPchPrivateLib/Sm > mPchPrivateLib.inf > new file mode 100644 > index 0000000000..6d4c3a5729 > --- /dev/null > +++ > b/Silicon/Intel/TigerlakeSiliconPkg/Pch/LibraryPrivate/SmmPchPrivateLib/Sm > mPchPrivateLib.inf > @@ -0,0 +1,31 @@ > +## @file > > +# PCH SMM private lib. > > +# > > +# Copyright (c) 2021, Intel Corporation. All rights reserved.<BR> > > +# SPDX-License-Identifier: BSD-2-Clause-Patent > > +# > > +## > > + > > + > > +[Defines] > > +INF_VERSION = 0x00010017 > > +BASE_NAME = SmmPchPrivateLib > > +FILE_GUID = FE6495FB-7AA9-4A24-BF3E-4698F7BCE0EE > > +VERSION_STRING = 1.0 > > +MODULE_TYPE = DXE_SMM_DRIVER > > +LIBRARY_CLASS = SmmPchPrivateLib > > + > > + > > +[LibraryClasses] > > +BaseLib > > +IoLib > > +DebugLib > > + > > + > > +[Packages] > > +MdePkg/MdePkg.dec > > +TigerlakeSiliconPkg/SiPkg.dec > > + > > + > > +[Sources] > > +SmmPchPrivateLib.c > > -- > 2.24.0.windows.2
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