Hi Mario,
Please re-send a v2 with a commit message that explains the issue that
is being fixed. Thanks.
For the record, I ran some tests that show that the divisor was changed
from 1 to 2 with the latest Pi Foundation firmware (which is confirmed
by the fact that if you switch your baudrate from 115200 to 57600,
you'll get the expected output).
I'm not sure what game the Pi Foundation are playing at this stage, coz
they sure don't seem to be following any official logic with how they
actually set the serial clock, and our attempts at second guessing that
logic are no longer working. So I guess the best we can do is go with
whatever gets us output for the latest firmware, and hope they're not
going to break that anytime soon (which is still better than the TF-A
approach, where they got so fed up with this cat and mouse game that
they dropped UART initialization altogether [1])
Regards,
/Pete
[1]
https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git/commit/plat/rpi?h=v2.3&id=0eda713b9bd65222155900aacf3a67805351f88f
On 2021.04.03 23:45, Mario Bălănică wrote:
Okay, I've tested the patch with the firmware from the commit mentioned
above and it doesn't work. The VPU clock divisor bit needs
PcdSerialClockRate to be set to 1 GHz (so that the quotient becomes
equal to the core clock).
The mailbox on the other hand always returns 200 MHz for the core clock.
This is definitely a bug, which got fixed it in a later commit.
There isn't any reliable way to support the firmwares with a broken
mailbox interface as well in this case, and I really doubt anyone would
want to use them with the UEFI in the first place. Your build scripts
always include the latest version.
I can resend the patch with a more detailed commit message if you wish.
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