> +//
> +// Root bridge resource information for parsing fw-cfg data
> +//
> +#pragma pack(1)
> +typedef struct {
> + BOOLEAN set_pxm;
> + BOOLEAN mark_prefetchable_resources_as_cacheable;
> +
> + UINT8 root_bus_nr;
> + UINT8 pxm;
> + UINT8 num_hot_plug_slots;
> +
> + UINT8 root_bur_nr_start;
> + UINT8 root_bus_nr_end;
> +
> + UINT32 lowmem_start;
> + UINT32 lowmem_end;
> + UINT32 lowmem_pref_start;
> + UINT32 lowmem_pref_end;
> +
> + UINT64 highmem_start;
> + UINT64 highmem_end;
> + UINT64 highmem_pref_start;
> + UINT64 highmem_pref_end;
> +} HOST_BRIDGE_INFO;
> +#pragma pack()
Hmm. A number of fields is not used by this patch series, pxm for
example. On the other hand it is incomplete, ioports are not there.
It looks like you are simply throwing some internal data structure
into fw_cfg. This is *not* how things should be done.
Is the host-side code for this open source btw? If so, do you
have a pointer?
I see two reasonable options going forward:
(1) Create a format which contains *everything* needed to describe
a pci(e) host bridge, not only those parts which you happen to
need for your use case. Basically all information needed by
PciHostBridgeUtilityInitRootBridge(), and the pcie config space
location. Drop fields not needed. And add comments documenting
the struct.
(2) Use an existing format. Obvious choice coming to mind is
device-tree. We already have a parser for that because the
arm platform (and riscv too soon) needs it to find the pcie
host bridge.
take care,
Gerd
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