[edk2-devel] [edk2-platforms][PATCH 25/30] Silicon/SiFive: Use mtime CSR library

[Abner Chang]

Use mtime CSR library interface to access mtime
CSR in Timer DXE driver.

Cc: Sunil V L <suni...@ventanamicro.com>
Cc: Daniel Schaefer <daniel.schae...@hpe.com>

Signed-off-by: Abner Chang <abner.ch...@hpe.com>
---
 .../FreedomU540HiFiveUnleashedBoard/U540.dsc       |  2 ++
 .../Universal/Dxe/TimerDxe/TimerDxe.inf            |  1 +
 .../U5SeriesPkg/Universal/Dxe/TimerDxe/Timer.c     | 14 +++++---------
 3 files changed, 8 insertions(+), 9 deletions(-)

diff --git 
a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc 
b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
index 4d16adfc82..c29b36e9bb 100644
--- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
@@ -148,6 +148,8 @@
   RiscVCpuLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVCpuLib/RiscVCpuLib.inf
   
RiscVEdk2SbiLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.inf
   
RiscVPlatformTimerLib|Platform/SiFive/U5SeriesPkg/Library/RiscVPlatformTimerLib/RiscVPlatformTimerLib.inf
+  
#MachineModeTimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachineModeTimer/MachineModeTimerLib/MachineModeTimerLib.inf
+  
MachineModeTimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachineModeTimer/EmulatedMachineModeTimerLib/EmulatedMachineModeTimerLib.inf
   
CpuExceptionHandlerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVExceptionLib/CpuExceptionHandlerDxeLib.inf
 
 
diff --git a/Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/TimerDxe.inf 
b/Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/TimerDxe.inf
index 25cb3bb8b4..4571621a2e 100644
--- a/Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/TimerDxe.inf
+++ b/Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/TimerDxe.inf
@@ -30,6 +30,7 @@
   BaseLib
   DebugLib
   IoLib
+  MachineModeTimerLib
   RiscVCpuLib
   RiscVEdk2SbiLib
   UefiBootServicesTableLib
diff --git a/Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/Timer.c 
b/Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/Timer.c
index 065ecdda86..deb5799277 100644
--- a/Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/Timer.c
+++ b/Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/Timer.c
@@ -15,9 +15,6 @@
 #include <sbi/riscv_atomic.h>
 #include <U5Clint.h>
 
-STATIC volatile VOID * const p_mtime = (VOID *)CLINT_REG_MTIME;
-#define MTIME          (*p_mtime)
-#define MTIMECMP(i)    (p_mtimecmp[i])
 BOOLEAN TimerHandlerReentry = FALSE;
 
 //
@@ -73,7 +70,7 @@ TimerInterruptHandler (
     // MMode timer occurred when processing
     // SMode timer handler.
     //
-    RiscvTimer = readq_relaxed(p_mtime);
+    RiscvTimer = RiscVReadMachineTimerInterface();
     SbiSetTimer (RiscvTimer += mTimerPeriod);
     csr_clear(CSR_SIP, MIP_STIP);
     return;
@@ -91,7 +88,7 @@ TimerInterruptHandler (
   if (mTimerNotifyFunction != NULL) {
       mTimerNotifyFunction (mTimerPeriod);
   }
-  RiscvTimer = readq_relaxed(p_mtime);
+  RiscvTimer = RiscVReadMachineTimerInterface();
   SbiSetTimer (RiscvTimer += mTimerPeriod);
   gBS->RestoreTPL (OriginalTPL);
   csr_set(CSR_SIE, MIP_STIP); // enable SMode timer int
@@ -185,10 +182,9 @@ TimerDriverSetTimerPeriod (
     return EFI_SUCCESS;
   }
 
-  mTimerPeriod = TimerPeriod / 10; // convert unit from 100ns to 1us
-
-  RiscvTimer = readq_relaxed(p_mtime);
-  SbiSetTimer(RiscvTimer + mTimerPeriod);
+  mTimerPeriod = TimerPeriod; // convert unit from 100ns to 1us
+  RiscvTimer = RiscVReadMachineTimerInterface();
+  SbiSetTimer(RiscvTimer + mTimerPeriod / 10);
 
   mCpu->EnableInterrupt(mCpu);
   csr_set(CSR_SIE, MIP_STIP); // enable timer int
-- 
2.31.1



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