Reviewed-by: Ankit Sinha <ankit.si...@intel.com> > -----Original Message----- > From: Desimone, Nathaniel L <nathaniel.l.desim...@intel.com> > Sent: Monday, June 6, 2022 3:50 PM > To: devel@edk2.groups.io > Cc: Chiu, Chasel <chasel.c...@intel.com>; Sinha, Ankit > <ankit.si...@intel.com>; Kubacki, Michael > <michael.kuba...@microsoft.com>; Chaganty, Rangasai V > <rangasai.v.chaga...@intel.com>; Kethi Reddy, Deepika > <deepika.kethi.re...@intel.com>; Esakkithevar, Kathappan > <kathappan.esakkithe...@intel.com> > Subject: [edk2-platforms] [PATCH V1 3/4] CometlakeOpenBoardPkg: Indicate > width of CLK duty cycle in FADT > > Set the location of the DUTY_CYCLE field in the P_CNT register and indicate > the width of the clock duty cycle to OS power management > > Cc: Chasel Chiu <chasel.c...@intel.com> > Cc: Ankit Sinha <ankit.si...@intel.com> > Cc: Michael Kubacki <michael.kuba...@microsoft.com> > Cc: Sai Chaganty <rangasai.v.chaga...@intel.com> > Cc: Deepika Kethi Reddy <deepika.kethi.re...@intel.com> > Cc: Kathappan Esakkithevar <kathappan.esakkithe...@intel.com> > Signed-off-by: Nate DeSimone <nathaniel.l.desim...@intel.com> > --- > .../CometlakeURvp/OpenBoardPkgPcd.dsc | 9 ++++++++- > 1 file changed, 8 insertions(+), 1 deletion(-) > > diff --git > a/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg > Pcd.dsc > b/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg > Pcd.dsc > index 589b002d06..68dd08423b 100644 > --- > a/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg > Pcd.dsc > +++ > b/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg > Pcd > +++ .dsc > @@ -1,7 +1,7 @@ > ## @file > # PCD configuration build description file for the CometlakeURvp board. > # > -# Copyright (c) 2020, Intel Corporation. All rights reserved.<BR> > +# Copyright (c) 2020 - 2022, Intel Corporation. All rights > +reserved.<BR> > # > # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -253,6 +253,13 @@ > gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuCoreCount|8 > gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuThreadCount|2 > > + # > + # Set the location of the DUTY_CYCLE field in the P_CNT register # > + and indicate the width of the clock duty cycle to OS power management > + # > + gMinPlatformPkgTokenSpaceGuid.PcdFadtDutyOffset|0x1 > + gMinPlatformPkgTokenSpaceGuid.PcdFadtDutyWidth|0x3 > + > # > # The PCDs are used to control the Windows SMM Security Mitigations > Table - Protection Flags > # > -- > 2.27.0.windows.1
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