Hi Mike, Yes. With this chance, each root bridge will have the bus resource size except the one which Meet the bus shortage case. Then the Bus Rebalance handle of EfiPciHostBridgeEndBusAllocation on platform BIOS will Have a chance to adjust the bus resource assignment for each root bridges which meet the Bus shortage case.
Best Regards Foster Nong EXT: 021-61164849 -----Original Message----- From: Kinney, Michael D <michael.d.kin...@intel.com> Sent: Saturday, July 23, 2022 7:49 AM To: devel@edk2.groups.io; Nong, Foster <foster.n...@intel.com>; Ni, Ray <ray...@intel.com>; Kinney, Michael D <michael.d.kin...@intel.com> Subject: RE: [edk2-devel] [PATCH 1/1] MdeModulePkg: Enhance bus scan for all root bridge instances Hi Foster, Does this change provide the resource size requirements for each root bridge so a rebalance or larger resource allocation can be performed? Thanks, Mike > -----Original Message----- > From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Foster > Nong > Sent: Friday, July 22, 2022 2:10 AM > To: devel@edk2.groups.io > Cc: Nong, Foster <foster.n...@intel.com> > Subject: [edk2-devel] [PATCH 1/1] MdeModulePkg: Enhance bus scan for > all root bridge instances > > Ref:https://bugzilla.tianocore.org/show_bug.cgi?id=4000 > > Change flow to bus scan all root bridge instances even when any one > root bridge meet bus resource OUT_OF_RESOURCE case. > thus platform handler of "EfiPciHostBridgeEndBusAllocation" has an > chance to do relative pci bus rebalance to handle this case. > > Signed-off-by: Foster Nong <foster.n...@intel.com> > --- > MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c | 14 ++++++++++++-- > 1 file changed, 12 insertions(+), 2 deletions(-) > > diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c > b/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c > index 63d149b3b8c0..a89f912de85b 100644 > --- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c > +++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c > @@ -1528,6 +1528,7 @@ PciHostBridgeEnumerator ( > UINT8 StartBusNumber; > LIST_ENTRY RootBridgeList; > LIST_ENTRY *Link; > + EFI_STATUS RootBridgeEnumerationStatus; > > if (FeaturePcdGet (PcdPciBusHotplugDeviceSupport)) { > InitializeHotPlugSupport (); > @@ -1546,6 +1547,7 @@ PciHostBridgeEnumerator ( > > DEBUG ((DEBUG_INFO, "PCI Bus First Scanning\n")); > RootBridgeHandle = NULL; > + RootBridgeEnumerationStatus = EFI_SUCCESS; > while (PciResAlloc->GetNextRootBridge (PciResAlloc, &RootBridgeHandle) == > EFI_SUCCESS) { > // > // if a root bridge instance is found, create root bridge device > for it @@ -1572,7 +1574,7 @@ PciHostBridgeEnumerator ( > } > > if (EFI_ERROR (Status)) { > - return Status; > + RootBridgeEnumerationStatus = Status; > } > } > > @@ -1581,6 +1583,10 @@ PciHostBridgeEnumerator ( > // > NotifyPhase (PciResAlloc, EfiPciHostBridgeEndBusAllocation); > > + if (EFI_ERROR (RootBridgeEnumerationStatus)) { > + return RootBridgeEnumerationStatus; } > + > if ((gPciHotPlugInit != NULL) && FeaturePcdGet > (PcdPciBusHotplugDeviceSupport)) { > // > // Reset all assigned PCI bus number in all PPB @@ -1659,7 > +1665,7 @@ PciHostBridgeEnumerator ( > > DestroyRootBridge (RootBridgeDev); > if (EFI_ERROR (Status)) { > - return Status; > + RootBridgeEnumerationStatus = Status; > } > } > > @@ -1667,6 +1673,10 @@ PciHostBridgeEnumerator ( > // Notify the bus allocation phase is to end for the 2nd time > // > NotifyPhase (PciResAlloc, EfiPciHostBridgeEndBusAllocation); > + > + if (EFI_ERROR (RootBridgeEnumerationStatus)) { > + return RootBridgeEnumerationStatus; > + } > } > > // > -- > 2.26.2.windows.1 > > > > > -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#91804): https://edk2.groups.io/g/devel/message/91804 Mute This Topic: https://groups.io/mt/92558124/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
