> -----邮件原件-----
> 发件人: devel@edk2.groups.io <devel@edk2.groups.io> 代表 Alexey
> Kardashevskiy via groups.io
> 发送时间: 2022年12月7日 20:25
> 收件人: gaoliming <gaolim...@byosoft.com.cn>; devel@edk2.groups.io
> 抄送: 'Ard Biesheuvel' <ardb+tianoc...@kernel.org>; 'Jiewen Yao'
> <jiewen....@intel.com>; 'Jordan Justen' <jordan.l.jus...@intel.com>; 'Gerd
> Hoffmann' <kra...@redhat.com>; 'Brijesh Singh' <brijesh.si...@amd.com>;
> 'Erdem Aktas' <erdemak...@google.com>; 'James Bottomley'
> <j...@linux.ibm.com>; 'Min Xu' <min.m...@intel.com>; 'Tom Lendacky'
> <thomas.lenda...@amd.com>
> 主题: Re: 回复: [edk2-devel] [PATCH ovmf 1/5] MdePkg/Register/Amd:
> Define all bits from MSR_SEV_STATUS_REGISTER
>
>
>
> On 7/12/22 13:13, gaoliming wrote:
> > Alexey:
> >
> >
> >> -----邮件原件-----
> >> 发件人: devel@edk2.groups.io <devel@edk2.groups.io> 代表 Alexey
> >> Kardashevskiy via groups.io
> >> 发送时间: 2022年12月1日 10:35
> >> 收件人: devel@edk2.groups.io
> >> 抄送: Ard Biesheuvel <ardb+tianoc...@kernel.org>; Jiewen Yao
> >> <jiewen....@intel.com>; Jordan Justen <jordan.l.jus...@intel.com>; Gerd
> >> Hoffmann <kra...@redhat.com>; Brijesh Singh <brijesh.si...@amd.com>;
> >> Erdem Aktas <erdemak...@google.com>; James Bottomley
> >> <j...@linux.ibm.com>; Min Xu <min.m...@intel.com>; Tom Lendacky
> >> <thomas.lenda...@amd.com>; Alexey Kardashevskiy <a...@amd.com>
> >> 主题: [edk2-devel] [PATCH ovmf 1/5] MdePkg/Register/Amd: Define all
> bits
> >> from MSR_SEV_STATUS_REGISTER
> >>
> >> We will need soon DebugSwap but others likely too.
> >>
> >> Signed-off-by: Alexey Kardashevskiy <a...@amd.com>
> >> ---
> >> MdePkg/Include/Register/Amd/Fam17Msr.h | 57
> +++++++++++++++++++-
> >> 1 file changed, 56 insertions(+), 1 deletion(-)
> >>
> >> diff --git a/MdePkg/Include/Register/Amd/Fam17Msr.h
> >> b/MdePkg/Include/Register/Amd/Fam17Msr.h
> >> index bb4e143e2456..f9474e6776f2 100644
> >> --- a/MdePkg/Include/Register/Amd/Fam17Msr.h
> >> +++ b/MdePkg/Include/Register/Amd/Fam17Msr.h
> >> @@ -121,7 +121,62 @@ typedef union {
> >> ///
> >> UINT32 SevSnpBit : 1;
> >>
> >> - UINT32 Reserved2 : 29;
> >> + ///
> >> + /// [Bit 3] The guest was run with the Virtual TOM feature enabled
> in
> >> SEV_FEATURES[1]
> >> + ///
> >> + UINT32 vTOM_Enabled : 1;
> >> +
> > This name doesn't follow name convention. You can create pull request to
> see
> > CI test result.
>
>
> It is though what 40332.pdf ("AMD64 Architecture Programmer’s Manual:
> Volumes 1-5") uses and I find it _extremely_ useful when searching for a
> feature in 3000+ pages PDF.
>
> What is the preferred way?
>
If CI reports this issue, you can add it into exception in MdePkg.ci.yaml.
Please create pull request to see CI result.
Thanks
Liming
> Thanks,
>
>
> >
> > Thanks
> > Liming
> >> + ///
> >> + /// [Bit 4] The guest was run with the ReflectVC feature enabled in
> >> SEV_FEATURES[2]
> >> + ///
> >> + UINT32 ReflectVC : 1;
> >> +
> >> + ///
> >> + /// [Bit 5] The guest was run with the Restricted Injection feature
> >> enabled in SEV_FEATURES[3]
> >> + ///
> >> + UINT32 RestrictedInjection : 1;
> >> +
> >> + ///
> >> + /// [Bit 6] The guest was run with the Alternate Injection feature
> >> enabled in SEV_FEATURES[4]
> >> + ///
> >> + UINT32 AlternateInjection : 1;
> >> +
> >> + ///
> >> + /// [Bit 7] This guest was run with debug register swapping enabled
> > in
> >> SEV_FEATURES[5]
> >> + ///
> >> + UINT32 DebugSwap : 1;
> >> +
> >> + ///
> >> + /// [Bit 8] This guest was run with the PreventHostIBS feature
> >> enabled in SEV_FEATURES[6]
> >> + ///
> >> + UINT32 PreventHostIBS : 1;
> >> +
> >> + ///
> >> + /// [Bit 9] The guest was run with the BTB isolation feature enabled
> > in
> >> SEV_FEATURES[7]
> >> + ///
> >> + UINT32 SNPBTBIsolation : 1;
> >> +
> >> + ///
> >> + /// [Bit 10]
> >> + ///
> >> + UINT32 Reserved0 : 1;
> >> +
> >> + ///
> >> + /// [Bit 11] The guest was run with the Secure TSC feature enabled
> in
> >> SEV_FEATURES[9]
> >> + ///
> >> + UINT32 SecureTsc : 1;
> >> +
> >> + ///
> >> + /// [Bits 12 13 14 15]
> >> + ///
> >> + UINT32 Reserved1 : 4;
> >> +
> >> + ///
> >> + /// [Bit 16] The guest was run with the VMSA Register Protection
> >> feature enabled in SEV_FEATURES[14]
> >> + ///
> >> + UINT32 VmsaRegProt_Enabled : 1;
> >> +
> >> + UINT32 Reserved2 : 15;
> >> } Bits;
> >> ///
> >> /// All bit fields as a 32-bit value
> >> --
> >> 2.38.1
> >>
> >>
> >>
> >>
> >>
> >
> >
> >
>
> --
> Alexey
>
>
>
>
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