Modify the page table entry access priority
When the Page table properties are set.
Cc: Ard Biesheuvel <ardb+tianoc...@kernel.org>
Cc: Bibo Mao <maob...@loongson.cn>
Cc: Chao Li <lic...@loongson.cn>
Cc: Leif Lindholm <quic_llind...@quicinc.com>
Cc: Liming Gao <gaolim...@byosoft.com.cn>
Cc: Michael D Kinney <michael.d.kin...@intel.com>
Signed-off-by: xianglai li <lixiang...@loongson.cn>
---
Platform/Loongson/LoongArchQemuPkg/Library/MmuLib/MmuLibCore.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Platform/Loongson/LoongArchQemuPkg/Library/MmuLib/MmuLibCore.c
b/Platform/Loongson/LoongArchQemuPkg/Library/MmuLib/MmuLibCore.c
index b932e3d568..9e2bd3344a 100644
--- a/Platform/Loongson/LoongArchQemuPkg/Library/MmuLib/MmuLibCore.c
+++ b/Platform/Loongson/LoongArchQemuPkg/Library/MmuLib/MmuLibCore.c
@@ -671,7 +671,7 @@ EfiAttributeToLoongArchAttribute (
IN UINTN EfiAttributes
)
{
- UINTN LoongArchAttributes = PAGE_VALID | PAGE_DIRTY | CACHE_CC | PAGE_USER
| PAGE_GLOBAL;
+ UINTN LoongArchAttributes = PAGE_VALID | PAGE_DIRTY | PLV_KERNEL |
PAGE_GLOBAL;
switch (EfiAttributes & EFI_MEMORY_CACHETYPE_MASK) {
case EFI_MEMORY_UC:
LoongArchAttributes |= CACHE_SUC;
--
2.31.1
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