Hi Vivek, Thank you for this patch.
These changes look good to me. Reviewed-by: Sami Mujawar <sami.muja...@arm.com> Regards, Sami Mujawar On 24/03/2023 11:02 am, Vivek Gautam wrote:
Some of the Arm reference design FVP platforms support the Virtio-p9 device as part of the RoS subsystem. Add an entry for this device in the SSDT acpi table. The device entry is listed in a new SSDT file as only some of the reference design FVP platforms support it and so this file is included in the build for only the platforms that support Virtio-P9 device. Signed-off-by: Vivek Gautam <vivek.gau...@arm.com> Reviewed-by: Pierre Gondois <pierre.gond...@arm.com> --- Platform/ARM/SgiPkg/SgiPlatform.dec | 7 +++- Platform/ARM/SgiPkg/SgiMemoryMap2.dsc.inc | 7 +++- Platform/ARM/SgiPkg/AcpiTables/SsdtRosVirtioP9.asl | 42 ++++++++++++++++++++ 3 files changed, 54 insertions(+), 2 deletions(-) diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dec b/Platform/ARM/SgiPkg/SgiPlatform.dec index b9be5c9060b6..e878af24d56b 100644 --- a/Platform/ARM/SgiPkg/SgiPlatform.dec +++ b/Platform/ARM/SgiPkg/SgiPlatform.dec @@ -1,5 +1,5 @@ # -# Copyright (c) 2018 - 2022, Arm Limited. All rights reserved. +# Copyright (c) 2018 - 2023, Arm Limited. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -46,6 +46,11 @@ gArmSgiTokenSpaceGuid.PcdVirtioNetSize|0x00000000|UINT32|0x00000008 gArmSgiTokenSpaceGuid.PcdVirtioNetInterrupt|0x00000000|UINT32|0x00000009+ # Virtio P9+ gArmSgiTokenSpaceGuid.PcdVirtioP9BaseAddress|0x00000000|UINT32|0x00000028 + gArmSgiTokenSpaceGuid.PcdVirtioP9Size|0x00000000|UINT32|0x00000029 + gArmSgiTokenSpaceGuid.PcdVirtioP9Interrupt|0x00000000|UINT32|0x0000002A + # Chip count on the platform gArmSgiTokenSpaceGuid.PcdChipCount|1|UINT32|0x0000000Bdiff --git a/Platform/ARM/SgiPkg/SgiMemoryMap2.dsc.inc b/Platform/ARM/SgiPkg/SgiMemoryMap2.dsc.incindex 78ee48e354a8..12dcd82eb132 100644 --- a/Platform/ARM/SgiPkg/SgiMemoryMap2.dsc.inc +++ b/Platform/ARM/SgiPkg/SgiMemoryMap2.dsc.inc @@ -1,5 +1,5 @@ # -# Copyright (c) 2020 - 2022, Arm Limited. All rights reserved. +# Copyright (c) 2020 - 2023, Arm Limited. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -38,6 +38,11 @@ gArmSgiTokenSpaceGuid.PcdVirtioNetBaseAddress|0x0C150000 gArmSgiTokenSpaceGuid.PcdVirtioNetInterrupt|460+ # Virtio P9+ gArmSgiTokenSpaceGuid.PcdVirtioP9BaseAddress|0x0C190000 + gArmSgiTokenSpaceGuid.PcdVirtioP9Size|0x10000 + gArmSgiTokenSpaceGuid.PcdVirtioP9Interrupt|459 + # PCIe gArmTokenSpaceGuid.PcdPciMmio32Base|0x60000000 gArmTokenSpaceGuid.PcdPciMmio32Size|0x10000000 diff --git a/Platform/ARM/SgiPkg/AcpiTables/SsdtRosVirtioP9.asl b/Platform/ARM/SgiPkg/AcpiTables/SsdtRosVirtioP9.asl new file mode 100644 index 000000000000..a1aab5e094b3 --- /dev/null +++ b/Platform/ARM/SgiPkg/AcpiTables/SsdtRosVirtioP9.asl @@ -0,0 +1,42 @@ +/** @file +* Secondary System Description Table Fields (SSDT) for Virtio-P9 device. +* +* Some of the Arm Reference Design FVP platforms support the Virtio-P9 device +* as part of the RoS subsystem. The Virtio-P9 device implements a subset of the +* Plan 9 file protocol over a virtio transport. It enables accessing a shared +* directory on the host's filesystem from a running FVP platform. +* This file describes the SSDT entry for this Virtio-P9 device +* +* Copyright (c) 2023, Arm Ltd. All rights reserved. +* +* SPDX-License-Identifier: BSD-2-Clause-Patent +* +* @par Specification Reference: +* - ACPI 6.4, Chapter 5, Section 5.2.11.2, Secondary System Description Table +**/ + +#include "SgiAcpiHeader.h" +#include "SgiPlatform.h" + +DefinitionBlock ("SsdtRosVirtioP9.aml", "SSDT", 2, "ARMLTD", "ARMSGI", + EFI_ACPI_ARM_OEM_REVISION) { + Scope (_SB) { + // VIRTIO P9 device + Device (VP90) { + Name (_HID, "LNRO0005") + Name (_UID, 2) + Name (_CCA, 1) // mark the device coherent + + Name (_CRS, ResourceTemplate() { + Memory32Fixed ( + ReadWrite, + FixedPcdGet32 (PcdVirtioP9BaseAddress), + FixedPcdGet32 (PcdVirtioP9Size) + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { + FixedPcdGet32 (PcdVirtioP9Interrupt) + } + }) + } + } // Scope(_SB) +}
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