On Tue, May 09, 2023 at 06:22:50PM +0800, Wu, Jiaxin wrote:
> For arch X64, system will enable the page table in SPI to cover 0-512G
> range via CR4.PAE & MSR.LME & CR0.PG & CR3 setting. Existing code doesn't
> cover the higher address access above 512G before memory-discovered
> callback. This series patches provide the solution to enable paging from
> temporary RAM Done.
> 
> Jiaxin Wu (3):
>   UefiCpuPkg/SecCore: Migrate page table to permanent memory
>   UefiCpuPkg/CpuMpPei: Enable PAE page table if CR0.PG is not set
>   MdeModulePkg/DxeIpl: Align Page table Level setting with previous
>     level.

Fails to build OvmfPkg/OvmfPkgX64.dsc

Please run this through CI before sending out the patches.

thanks,
  Gerd



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