> -----Original Message----- > From: Ard Biesheuvel <a...@kernel.org> > Sent: Tuesday, May 23, 2023 7:59 AM > To: Kinney, Michael D <michael.d.kin...@intel.com> > Cc: devel@edk2.groups.io; ler...@redhat.com; Ni, Ray <ray...@intel.com>; > Yao, Jiewen <jiewen....@intel.com>; Gerd Hoffmann > <kra...@redhat.com>; Taylor Beebe <t...@taylorbeebe.com>; Oliver Smith- > Denny <o...@smith-denny.com> > Subject: Re: [edk2-devel] managing memory attributes in PEI > > On Tue, 23 May 2023 at 16:49, Kinney, Michael D > <michael.d.kin...@intel.com> wrote: > > > > Ard, > > > > I would prefer to keep the IA32 PEI support for OVMF. > > > > Sure. But does that imply that all enhancements regarding memory > protections should be introduced there as well?
I would prefer to not support these protections in IA32 PEI. Same for IA32 DXE. Can the proposed PPI do nothing for IA32? > > If so, could you help figure out whether or not running IA32 PEI in > 32-bit compatible long mode with 4 level page tables would be > feasible? That would greatly reduce the complexity, given that PEI and > DXE will be able to share page tables, and will only need one version > of the page table logic. > > > Ray had proposed an idea to introduce a library class to help > > with the DXEIPL complexity. Perhaps that can be combines with > > this effort. > > > > Indeed. But the problem remains that creating a set of page tables > that are incompatible with the present execution mode is highly > specific to IA32 PEI + X64 DXE, and this impacts the code for all > other architectures. -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#105197): https://edk2.groups.io/g/devel/message/105197 Mute This Topic: https://groups.io/mt/99062463/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/leave/9847357/21656/1706620634/xyzzy [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
