On Thu, Jun 22, 2023 at 10:59 AM Xue, Gavin <gavin....@intel.com> wrote: > > Hi Pedro, > > Thanks for your feedback. > > The sample code what I listed in last mail is from/owned by another team, and > I didn't find other special #ifndef case for RSIC-V building so far. > RISC-V is an new processor architecture in edk2 implementation, in our > internal BIOS code, there are many similar common code for edk2 and Windows > app (for simulation). > It's better if we can reuse existing code (mostly are from x86) and minimize > modifications as much as possible. So I think use same guard name is make > sense. > How about your comments? Thanks.
+CC Mike K I (personally) would oppose this change. The specific include guard's name is an implementation detail that should not be relied upon by the header's consumers. In my view, your code should just get fixed. The ideas I put out should still work for any CPU arch (even if hacky; ideally, you would just set some sort of IS_EFI macro when building). Mike, any opinion on this matter? -- Pedro -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#106284): https://edk2.groups.io/g/devel/message/106284 Mute This Topic: https://groups.io/mt/99567569/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
