W dniu 4.07.2023 o 09:20, Yuquan Wang pisze:
Sorry to disturb you but I would like to consult you a little question
about this patch because of my lack of engineering experience:
Q: It seems like that the third patch will delete Iort.aslc file and
moving the creation of IORT into SbsaQemuAcpiDxe driver, so the firmware
can dynamically create a suitable MADT & IORT ?
Yes.
By the way, dose this means part of Shashi's code in the first patch
(add GIC ITS support) will be covered/removed?
This series is work in progress. Shashi wrote GIC ITS code over year ago
but it was waiting for versioning of the platform.
His code works if QEMU has GIC ITS support built-in. But had address
hardcoded.
I added export of GIC ITS address into DeviceTree exported by QEMU. Then
TF-A exports it. EDK2 uses SMC call to get address from TF-A and
initialize GIC ITS properly. I added code for it to Shashi's patch so it
can be tested how it is supposed to work on platform with GIC ITS present.
Then I started working on getting EDK2 working on system where GIC ITS
is not present (like QEMU 8.0.0 release). On such platform we cannot
export ITS node in neither MADT nor IORT because there is no (virtual)
hardware for it.
I lack skills to handle .aslc files so moved creation of tables to C
code and added some checks so ITS nodes are created only when there is
ITS hardware present.
QEMU HEAD (with GIC ITS) boots fine to Linux and complex PCI Express
setups work (my test config has PCIe switch, PCIe-to-PCI bridge, PCIe
root ports and extra PCIe root complex).
The problem is with QEMU 8.0.0 (no GIC ITS) where I get some kernel
complaints about interrupts. And this is what I am working on right now.
https://github.com/hrw/fork-edk2-platforms/commits/submit/0628-its has
my work-in-progress tree.
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