I am OK for the RISC-V change.

Would you please let me know why we need openssl submodule ?


> -----Original Message-----
> From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Andrei
> Warkentin
> Sent: Tuesday, September 19, 2023 12:43 PM
> To: devel@edk2.groups.io
> Cc: Warkentin, Andrei <andrei.warken...@intel.com>; Li, Yong
> <yong...@intel.com>; Sunil V L <suni...@ventanamicro.com>; Tuan Phan
> <tp...@ventanamicro.com>; Daniel Schaefer <g...@danielschaefer.me>
> Subject: [edk2-devel] [PATCH v1 1/1] RISCV: Fix InternalLongJump to return
> correct value
> 
> InternalLongJump was not returning the 2nd parameter passed
> to LongJmp (Value) as the return value from SetJmp.
> 
> Seen with code compiled with -Os, where an LongJmp (Buffer, -1)
> somehow translated to SetJmp returning 0...
> 
> Cc: Yong Li <yong...@intel.com>
> Cc: Sunil V L <suni...@ventanamicro.com>
> Cc: Tuan Phan <tp...@ventanamicro.com>
> Cc: Daniel Schaefer <g...@danielschaefer.me>
> Signed-off-by: Andrei Warkentin <andrei.warken...@intel.com>
> ---
>  CryptoPkg/Library/OpensslLib/openssl                  | 2 +-
>  MdePkg/Library/BaseLib/RiscV64/RiscVSetJumpLongJump.S | 7 ++-----
>  2 files changed, 3 insertions(+), 6 deletions(-)
> 
> diff --git a/CryptoPkg/Library/OpensslLib/openssl
> b/CryptoPkg/Library/OpensslLib/openssl
> index de90e54bbe82..830bf8e1e474 160000
> --- a/CryptoPkg/Library/OpensslLib/openssl
> +++ b/CryptoPkg/Library/OpensslLib/openssl
> @@ -1 +1 @@
> -Subproject commit de90e54bbe82e5be4fb9608b6f5c308bb837d355
> +Subproject commit 830bf8e1e4749ad65c51b6a1d0d769ae689404ba
> diff --git a/MdePkg/Library/BaseLib/RiscV64/RiscVSetJumpLongJump.S
> b/MdePkg/Library/BaseLib/RiscV64/RiscVSetJumpLongJump.S
> index 34486eabba4c..e97a7d0727b8 100644
> --- a/MdePkg/Library/BaseLib/RiscV64/RiscVSetJumpLongJump.S
> +++ b/MdePkg/Library/BaseLib/RiscV64/RiscVSetJumpLongJump.S
> @@ -3,6 +3,7 @@
>  // Set/Long jump for RISC-V
>  //
>  // Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights
> reserved.<BR>
> +// Copyright (c) 2023, Intel Corporation. All rights reserved.<BR>
>  //
>  // SPDX-License-Identifier: BSD-2-Clause-Patent
>  //
> @@ -47,9 +48,5 @@ InternalLongJump:
>      REG_L s10, 11*SZREG(a0)
>      REG_L s11, 12*SZREG(a0)
>      REG_L sp,  13*SZREG(a0)
> -
> -    add   a0, s0, 0
> -    add   a1, s1, 0
> -    add   a2, s2, 0
> -    add   a3, s3, 0
> +    mv    a0, a1
>      ret
> --
> 2.34.1
> 
> 
> 
> 
> 



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