For all the series (5 patches), Reviewed-by: Ray Ni <ray...@intel.com>
Can you kindly create PR and update the copyright year in file header in the final PR? Thanks, Ray > -----Original Message----- > From: Sheng, W <w.sh...@intel.com> > Sent: Wednesday, December 6, 2023 4:16 PM > To: devel@edk2.groups.io > Cc: Dong, Eric <eric.d...@intel.com>; Ni, Ray <ray...@intel.com>; Laszlo > Ersek <ler...@redhat.com>; Wu, Jiaxin <jiaxin...@intel.com>; Tan, Dun > <dun....@intel.com> > Subject: [PATCH v7 1/5] UefiCpuPkg: Add macro definitions for CET feature for > NASM files. > > Signed-off-by: Sheng Wei <w.sh...@intel.com> > Cc: Eric Dong <eric.d...@intel.com> > Cc: Ray Ni <ray...@intel.com> > Cc: Laszlo Ersek <ler...@redhat.com> > Cc: Wu Jiaxin <jiaxin...@intel.com> > Cc: Tan Dun <dun....@intel.com> > --- > UefiCpuPkg/PiSmmCpuDxeSmm/Cet.inc | 26 > ++++++++++++++++++++++++++ > 1 file changed, 26 insertions(+) > create mode 100644 UefiCpuPkg/PiSmmCpuDxeSmm/Cet.inc > > diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Cet.inc > b/UefiCpuPkg/PiSmmCpuDxeSmm/Cet.inc > new file mode 100644 > index 0000000000..41c99988c9 > --- /dev/null > +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Cet.inc > @@ -0,0 +1,26 @@ > +;------------------------------------------------------------------------------ > > +; > > +; Copyright (c) 2023, Intel Corporation. All rights reserved.<BR> > > +; SPDX-License-Identifier: BSD-2-Clause-Patent > > +; > > +; Abstract: > > +; > > +; This file provides macro definitions for CET feature for NASM files. > > +; > > +;------------------------------------------------------------------------------ > > + > > +%define MSR_IA32_U_CET 0x6A0 > > +%define MSR_IA32_S_CET 0x6A2 > > +%define MSR_IA32_CET_SH_STK_EN (1<<0) > > +%define MSR_IA32_CET_WR_SHSTK_EN (1<<1) > > +%define MSR_IA32_CET_ENDBR_EN (1<<2) > > +%define MSR_IA32_CET_LEG_IW_EN (1<<3) > > +%define MSR_IA32_CET_NO_TRACK_EN (1<<4) > > +%define MSR_IA32_CET_SUPPRESS_DIS (1<<5) > > +%define MSR_IA32_CET_SUPPRESS (1<<10) > > +%define MSR_IA32_CET_TRACKER (1<<11) > > +%define MSR_IA32_PL0_SSP 0x6A4 > > +%define MSR_IA32_INTERRUPT_SSP_TABLE_ADDR 0x6A8 > > + > > +%define CR4_CET_BIT 23 > > +%define CR4_CET (1<<CR4_CET_BIT) > > -- > 2.26.2.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#112169): https://edk2.groups.io/g/devel/message/112169 Mute This Topic: https://groups.io/mt/103009377/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/leave/9847357/21656/1706620634/xyzzy [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
