Hi Laszlo,

Yes.  I can add more details in the commit message.

The impact is for ACPI S4.  There are many reasons why the set of
HOBs passed into the DXE Core may change from boot to boot or that
allocations in the early DXE init phase should change where the
memory type information bins are allocated.

ACPI S4 does do a power cycle and it is possible to do FW updates
or FW setup config changes between an S4 save and S4 resume operation.

It is even possible for one OS to do S4 save.  Reboot the system
to boot a completely different OS.  Reboot again and do an S4 resume
of the original OS.

If a platform chooses to enable this feature, the number of scenarios
that an S4 resume can fail is reduced.

Mike

> -----Original Message-----
> From: Laszlo Ersek <ler...@redhat.com>
> Sent: Wednesday, January 24, 2024 6:21 AM
> To: devel@edk2.groups.io; Kinney, Michael D <michael.d.kin...@intel.com>
> Cc: Liming Gao <gaolim...@byosoft.com.cn>; Li, Aaron
> <aaron...@intel.com>; Liu, Yun Y <yun.y....@intel.com>; Andrew Fish
> <af...@apple.com>
> Subject: Re: [edk2-devel] [Patch v2 1/1] MdeModulePkg/Core/Dxe: Set
> MemoryTypeInfo bin range from HOB
> 
> On 1/23/24 21:24, Michael D Kinney wrote:
> > Provide an optional method for PEI to declare a specific address
> > range to use for the Memory Type Information bins. The current
> > algorithm uses heuristics that tends to place the Memory Type
> > Information bins in the same location, but memory configuration
> > changes across boots or algorithm changes across a firmware
> > updates could potentially change the Memory Type Information bin
> > location.
> 
> (5) Why is such a rearrangement of the bins -- which is likely visible
> in the UEFI memory map, too -- a problem?
> 
> Can we include a hint on that in the commit message?
> 
> I understand why it would be a problem across ACPI S4, but a memory
> config change (DIMM addition/removal?), or a firmware update, seems to
> require a full S5 power cycle.
> 
> Thanks
> Laszlo



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