On Thu, Mar 28, 2024 at 07:46:28 +0000, Xiong Yining wrote:
> From: Marcin Juszkiewicz <[email protected]>
>
> We have SbsaQemuHardwareInfoLib to ask for hardware details. No need to
> parse DeviceTree anymore.
>
> Signed-off-by: Marcin Juszkiewicz <[email protected]>
> Signed-off-by: Xiong Yining <[email protected]>
> Reviewed-by: Leif Lindholm <[email protected]>
> ---
> .../Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf | 6 ++----
> .../SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf | 5 ++---
> .../Library/SbsaQemuLib/SbsaQemuLib.inf | 4 ++--
> .../Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c | 11 +++++-----
> .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c | 21 +++++++------------
> 5 files changed, 18 insertions(+), 29 deletions(-)
>
Two mistakes in this file breaks bisect again, this time between 2/4
and 3/4.
> diff --git a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.inf
> b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.inf
> index c067a80cc715..07e6bc4e9b11 100644
> --- a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.inf
> +++ b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.inf
> @@ -1,6 +1,6 @@
> #/* @file
> #
> -# Copyright (c) 2019, Linaro Limited. All rights reserved.
> +# Copyright (c) 2019-2024, Linaro Limited. All rights reserved.
> #
> # SPDX-License-Identifier: BSD-2-Clause-Patent
> #
> @@ -32,9 +32,9 @@
> ArmLib
> BaseMemoryLib
> DebugLib
> - FdtLib
1) We don't update the memory discovery to use HardwareInfoLib until
the next commit.
> MemoryAllocationLib
> PcdLib
> + SbsaQemuHardwareInfoLib
2) This is now just called HardwareInfoLib.
I really don't want to see a v12, so I have fixed this up locally and
pushed this set as 8e5981584663..4e77c070c070.
Thanks!
(But please be more careful with bisect breakage in future.)
/
Leif
>
> [Pcd]
> gArmTokenSpaceGuid.PcdSystemMemoryBase
> diff --git a/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c
> b/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c
> index c38f2851904f..854f6f4072d5 100644
> --- a/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c
> +++ b/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c
> @@ -2,7 +2,7 @@
> * OemMiscLib.c
> *
> * Copyright (c) 2021, NUVIA Inc. All rights reserved.
> -* Copyright (c) 2020, Linaro Ltd. All rights reserved.
> +* Copyright (c) 2020-2024, Linaro Ltd. All rights reserved.
> *
> * SPDX-License-Identifier: BSD-2-Clause-Patent
> *
> @@ -12,14 +12,13 @@
> #include <Guid/ZeroGuid.h>
> #include <Library/BaseMemoryLib.h>
> #include <Library/DebugLib.h>
> -#include <Library/FdtHelperLib.h>
> #include <Library/HiiLib.h>
> #include <Library/IoLib.h>
> #include <Library/OemMiscLib.h>
> #include <Library/PcdLib.h>
> +#include <Library/HardwareInfoLib.h>
> #include <Library/SerialPortLib.h>
> #include <Library/TimerLib.h>
> -#include <libfdt.h>
>
> /** Returns whether the specified processor is present or not.
>
> @@ -33,7 +32,7 @@ OemIsProcessorPresent (
> UINTN ProcessorIndex
> )
> {
> - if (ProcessorIndex < FdtHelperCountCpus ()) {
> + if (ProcessorIndex < GetCpuCount ()) {
> return TRUE;
> }
>
> @@ -76,7 +75,7 @@ OemGetProcessorInformation (
> {
> UINT16 ProcessorCount;
>
> - ProcessorCount = FdtHelperCountCpus ();
> + ProcessorCount = GetCpuCount ();
>
> if (ProcessorIndex < ProcessorCount) {
> ProcessorStatus->Bits.CpuStatus = 1; // CPU enabled
> @@ -121,7 +120,7 @@ OemGetMaxProcessors (
> VOID
> )
> {
> - return FdtHelperCountCpus ();
> + return GetCpuCount ();
> }
>
> /** Gets information about the cache at the specified cache level.
> diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
> b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
> index 9fb17151d7b8..4ebe2a445344 100644
> --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
> +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
> @@ -1,7 +1,7 @@
> /** @file
> * This file is an ACPI driver for the Qemu SBSA platform.
> *
> -* Copyright (c) 2020, Linaro Ltd. All rights reserved.
> +* Copyright (c) 2020-2024, Linaro Ltd. All rights reserved.
> *
> * SPDX-License-Identifier: BSD-2-Clause-Patent
> *
> @@ -15,10 +15,10 @@
> #include <Library/ArmLib.h>
> #include <Library/BaseMemoryLib.h>
> #include <Library/DebugLib.h>
> -#include <Library/FdtHelperLib.h>
> #include <Library/MemoryAllocationLib.h>
> #include <Library/PcdLib.h>
> #include <Library/PrintLib.h>
> +#include <Library/HardwareInfoLib.h>
> #include <Library/UefiBootServicesTableLib.h>
> #include <Library/UefiDriverEntryPoint.h>
> #include <Library/UefiLib.h>
> @@ -255,8 +255,7 @@ AddMadtTable (
> // Initialize GIC Redistributor Structure
> EFI_ACPI_6_0_GICR_STRUCTURE Gicr = SBSAQEMU_MADT_GICR_INIT();
>
> - // Get CoreCount which was determined eariler after parsing device tree
> - NumCores = PcdGet32 (PcdCoreCount);
> + NumCores = GetCpuCount ();
>
> // Calculate the new table size based on the number of cores
> TableSize = sizeof (EFI_ACPI_6_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER) +
> @@ -291,13 +290,13 @@ AddMadtTable (
> New += sizeof (EFI_ACPI_6_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER);
>
> // Add new GICC structures for the Cores
> - for (CoreIndex = 0; CoreIndex < PcdGet32 (PcdCoreCount); CoreIndex++) {
> + for (CoreIndex = 0; CoreIndex < NumCores; CoreIndex++) {
> EFI_ACPI_6_0_GIC_STRUCTURE *GiccPtr;
>
> CopyMem (New, &Gicc, sizeof (EFI_ACPI_6_0_GIC_STRUCTURE));
> GiccPtr = (EFI_ACPI_6_0_GIC_STRUCTURE *) New;
> GiccPtr->AcpiProcessorUid = CoreIndex;
> - GiccPtr->MPIDR = FdtHelperGetMpidr (CoreIndex);
> + GiccPtr->MPIDR = GetMpidr (CoreIndex);
> New += sizeof (EFI_ACPI_6_0_GIC_STRUCTURE);
> }
>
> @@ -396,7 +395,7 @@ AddSsdtTable (
> UINT32 CpuId;
> UINT32 Offset;
> UINT8 ScopeOpName[] = SBSAQEMU_ACPI_SCOPE_NAME;
> - UINT32 NumCores = PcdGet32 (PcdCoreCount);
> + UINT32 NumCores = GetCpuCount ();
>
> EFI_ACPI_DESCRIPTION_HEADER Header =
> SBSAQEMU_ACPI_HEADER (
> @@ -497,7 +496,7 @@ AddPpttTable (
> EFI_PHYSICAL_ADDRESS PageAddress;
> UINT8 *New;
> UINT32 CpuId;
> - UINT32 NumCores = PcdGet32 (PcdCoreCount);
> + UINT32 NumCores = GetCpuCount ();
>
> EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE L1DCache =
> SBSAQEMU_ACPI_PPTT_L1_D_CACHE_STRUCT;
> EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE L1ICache =
> SBSAQEMU_ACPI_PPTT_L1_I_CACHE_STRUCT;
> @@ -758,12 +757,6 @@ InitializeSbsaQemuAcpiDxe (
> {
> EFI_STATUS Status;
> EFI_ACPI_TABLE_PROTOCOL *AcpiTable;
> - UINT32 NumCores;
> -
> - // Parse the device tree and get the number of CPUs
> - NumCores = FdtHelperCountCpus ();
> - Status = PcdSet32S (PcdCoreCount, NumCores);
> - ASSERT_RETURN_ERROR (Status);
>
> // Check if ACPI Table Protocol has been installed
> Status = gBS->LocateProtocol (
> --
> 2.34.1
>
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