You can verify too:
./olpcflash -i 0x381 -v somefile
why it's 381 and not the default I don't know.
What's amazing: the read code worked on the first rev.
Write does not work, I think something is still write protected.
You might note that if you want to play with writes you need kb.c as
well. kb.c is supposed to enable writes.
--
Richard A. Smith
#include <stdio.h>
#include <sys/io.h>
#include <unistd.h>
#include <stdlib.h>
/*
1) We did not implement the user intervention (pressing space bar five secs) now, the SPI write enable is always active.
2) The EC and BIOS share the same SPI ROM, please take steps to flash the binary.
a) Before flash Utility try to update any data to flash part, flash utility must issue 0xD8 command to LPC I/O port 0x66(write), and wait I/O port 0x66(read) IBF(bit 1) cleared.
b)Then flash utility set the bit 0 of EC internal register [0xFF14] through Index I/O accessing... (0x381 is high address register, 0x382 is the low address register, 0x383 is the data register...)
c) Flash utility ERASE and PROGRAM SPI ROM
d) After flash utility completes the flash action, flash utility just need to clear the Bit 0 of EC internal register [0xFF14] through Index I/O accessing...
*/
void Before(void)
{
unsigned char temp;
outb( 0xD8, 0x66);
while (inb(0x66) & 0x02);
// force KBC into Reset Mode
outb( 0xFF, 0x381);
outb( 0x14, 0x382);
temp = inb(0x383) | 0x01;
outb( temp, 0x383);
}
void After(void)
{
unsigned char temp;
// KBC back to normal run mode.
outb( 0xFF, 0x381);
outb( 0x14, 0x382);
temp = inb(0x383) & ~(0x01);
outb( temp, 0x383);
}
void usage(char *name) {
printf("usage: %s [on|off]\n", name);
exit(1);
}
int
main(int argc, char *argv[]){
if (iopl(3) < 0) {
perror("iopl");
exit(1);
}
if (argc > 2)
usage(argv[0]);
/* default: off */
if (argc < 2) {
Before();
exit(0);
}
if (! strcmp(argv[1], "off")){
Before();
exit(0);
}
if (! strcmp(argv[1], "on")){
After();
exit(0);
}
usage(argv[0]);
}
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