On Mon, Jun 25, 2012 at 12:14 PM, Seth Jennings <[email protected]> wrote: > This patch adds support for a local_tlb_flush_kernel_range() > function for the x86 arch. This function allows for CPU-local > TLB flushing, potentially using invlpg for single entry flushing, > using an arch independent function name.
What x86 hardware did you use to figure the optimal number? > > Signed-off-by: Seth Jennings <[email protected]> > --- > arch/x86/include/asm/tlbflush.h | 21 +++++++++++++++++++++ > 1 file changed, 21 insertions(+) > > diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflush.h > index 36a1a2a..92a280b 100644 > --- a/arch/x86/include/asm/tlbflush.h > +++ b/arch/x86/include/asm/tlbflush.h > @@ -168,4 +168,25 @@ static inline void flush_tlb_kernel_range(unsigned long > start, > flush_tlb_all(); > } > > +#define __HAVE_LOCAL_FLUSH_TLB_KERNEL_RANGE > +/* > + * INVLPG_BREAK_EVEN_PAGES is the number of pages after which single tlb > + * flushing becomes more costly than just doing a complete tlb flush. > + * While this break even point varies among x86 hardware, tests have shown > + * that 8 is a good generic value. > +*/ > +#define INVLPG_BREAK_EVEN_PAGES 8 > +static inline void local_flush_tlb_kernel_range(unsigned long start, > + unsigned long end) > +{ > + if (cpu_has_invlpg && > + (end - start)/PAGE_SIZE <= INVLPG_BREAK_EVEN_PAGES) { > + while (start < end) { > + __flush_tlb_single(start); > + start += PAGE_SIZE; > + } > + } else > + local_flush_tlb(); > +} > + > #endif /* _ASM_X86_TLBFLUSH_H */ > -- > 1.7.9.5 > > -- > To unsubscribe, send a message with 'unsubscribe linux-mm' in > the body to [email protected]. For more info on Linux MM, > see: http://www.linux-mm.org/ . > Don't email: <a href=mailto:"[email protected]";> [email protected] </a> > _______________________________________________ devel mailing list [email protected] http://driverdev.linuxdriverproject.org/mailman/listinfo/devel
