On Sun, 2007-07-08 at 11:56 -1000, Mitch Bradley wrote: > Are we sure that the Marvell chip is the source of the problem? The > Omnivision chip could also be affecting the timing.
That's possible, although it doesn't quite seem to fit the failure mode. But then, I haven't investigated the failure mode that hard either so I could be wrong. It would be useful to hook it up and watch both PCI and SMBus activity at the same time. -- dwmw2 _______________________________________________ Devel mailing list [email protected] http://lists.laptop.org/listinfo/devel
