On Wed, 3 Dec 2025 00:28:30 +0800 Zhao Liu <[email protected]> wrote:
> From: Philippe Mathieu-Daudé <[email protected]> > > The CPUX86State::full_cpuid_auto_level boolean was only > disabled for the pc-q35-2.7 and pc-i440fx-2.7 machines, > which got removed. Being now always %true, we can remove > it and simplify x86_cpu_expand_features(). > > Signed-off-by: Philippe Mathieu-Daudé <[email protected]> > Reviewed-by: Zhao Liu <[email protected]> > Signed-off-by: Zhao Liu <[email protected]> Reviewed-by: Igor Mammedov <[email protected]> > --- > Note, although libvirt still uses this property in its test cases, it > was confirmed this property is not exposed to user directly [*]. > > [*]: https://lore.kernel.org/qemu-devel/[email protected]/ > --- > target/i386/cpu.c | 111 ++++++++++++++++++++++------------------------ > target/i386/cpu.h | 3 -- > 2 files changed, 54 insertions(+), 60 deletions(-) > > diff --git a/target/i386/cpu.c b/target/i386/cpu.c > index 641777578637..72c69ba81c1b 100644 > --- a/target/i386/cpu.c > +++ b/target/i386/cpu.c > @@ -9019,69 +9019,67 @@ void x86_cpu_expand_features(X86CPU *cpu, Error > **errp) > > /* CPUID[EAX=7,ECX=0].EBX always increased level automatically: */ > x86_cpu_adjust_feat_level(cpu, FEAT_7_0_EBX); > - if (cpu->full_cpuid_auto_level) { > - x86_cpu_adjust_feat_level(cpu, FEAT_1_EDX); > - x86_cpu_adjust_feat_level(cpu, FEAT_1_ECX); > - x86_cpu_adjust_feat_level(cpu, FEAT_6_EAX); > - x86_cpu_adjust_feat_level(cpu, FEAT_7_0_ECX); > - x86_cpu_adjust_feat_level(cpu, FEAT_7_1_EAX); > - x86_cpu_adjust_feat_level(cpu, FEAT_7_1_ECX); > - x86_cpu_adjust_feat_level(cpu, FEAT_7_1_EDX); > - x86_cpu_adjust_feat_level(cpu, FEAT_7_2_EDX); > - x86_cpu_adjust_feat_level(cpu, FEAT_8000_0001_EDX); > - x86_cpu_adjust_feat_level(cpu, FEAT_8000_0001_ECX); > - x86_cpu_adjust_feat_level(cpu, FEAT_8000_0007_EDX); > - x86_cpu_adjust_feat_level(cpu, FEAT_8000_0008_EBX); > - x86_cpu_adjust_feat_level(cpu, FEAT_C000_0001_EDX); > - x86_cpu_adjust_feat_level(cpu, FEAT_SVM); > - x86_cpu_adjust_feat_level(cpu, FEAT_XSAVE); > - > - /* Intel Processor Trace requires CPUID[0x14] */ > - if ((env->features[FEAT_7_0_EBX] & CPUID_7_0_EBX_INTEL_PT)) { > - if (cpu->intel_pt_auto_level) { > - x86_cpu_adjust_level(cpu, &cpu->env.cpuid_min_level, 0x14); > - } else if (cpu->env.cpuid_min_level < 0x14) { > - mark_unavailable_features(cpu, FEAT_7_0_EBX, > - CPUID_7_0_EBX_INTEL_PT, > - "Intel PT need CPUID leaf 0x14, please set by \"-cpu > ...,intel-pt=on,min-level=0x14\""); > - } > + x86_cpu_adjust_feat_level(cpu, FEAT_1_EDX); > + x86_cpu_adjust_feat_level(cpu, FEAT_1_ECX); > + x86_cpu_adjust_feat_level(cpu, FEAT_6_EAX); > + x86_cpu_adjust_feat_level(cpu, FEAT_7_0_ECX); > + x86_cpu_adjust_feat_level(cpu, FEAT_7_1_EAX); > + x86_cpu_adjust_feat_level(cpu, FEAT_7_1_ECX); > + x86_cpu_adjust_feat_level(cpu, FEAT_7_1_EDX); > + x86_cpu_adjust_feat_level(cpu, FEAT_7_2_EDX); > + x86_cpu_adjust_feat_level(cpu, FEAT_8000_0001_EDX); > + x86_cpu_adjust_feat_level(cpu, FEAT_8000_0001_ECX); > + x86_cpu_adjust_feat_level(cpu, FEAT_8000_0007_EDX); > + x86_cpu_adjust_feat_level(cpu, FEAT_8000_0008_EBX); > + x86_cpu_adjust_feat_level(cpu, FEAT_C000_0001_EDX); > + x86_cpu_adjust_feat_level(cpu, FEAT_SVM); > + x86_cpu_adjust_feat_level(cpu, FEAT_XSAVE); > + > + /* Intel Processor Trace requires CPUID[0x14] */ > + if ((env->features[FEAT_7_0_EBX] & CPUID_7_0_EBX_INTEL_PT)) { > + if (cpu->intel_pt_auto_level) { > + x86_cpu_adjust_level(cpu, &cpu->env.cpuid_min_level, 0x14); > + } else if (cpu->env.cpuid_min_level < 0x14) { > + mark_unavailable_features(cpu, FEAT_7_0_EBX, > + CPUID_7_0_EBX_INTEL_PT, > + "Intel PT need CPUID leaf 0x14, please set by \"-cpu > ...,intel-pt=on,min-level=0x14\""); > } > + } > > - /* > - * Intel CPU topology with multi-dies support requires CPUID[0x1F]. > - * For AMD Rome/Milan, cpuid level is 0x10, and guest OS should > detect > - * extended toplogy by leaf 0xB. Only adjust it for Intel CPU, unless > - * cpu->vendor_cpuid_only has been unset for compatibility with older > - * machine types. > - */ > - if (x86_has_cpuid_0x1f(cpu) && > - (IS_INTEL_CPU(env) || !cpu->vendor_cpuid_only)) { > - x86_cpu_adjust_level(cpu, &env->cpuid_min_level, 0x1F); > - } > + /* > + * Intel CPU topology with multi-dies support requires CPUID[0x1F]. > + * For AMD Rome/Milan, cpuid level is 0x10, and guest OS should detect > + * extended toplogy by leaf 0xB. Only adjust it for Intel CPU, unless > + * cpu->vendor_cpuid_only has been unset for compatibility with older > + * machine types. > + */ > + if (x86_has_cpuid_0x1f(cpu) && > + (IS_INTEL_CPU(env) || !cpu->vendor_cpuid_only)) { > + x86_cpu_adjust_level(cpu, &env->cpuid_min_level, 0x1F); > + } > > - /* Advanced Vector Extensions 10 (AVX10) requires CPUID[0x24] */ > - if (env->features[FEAT_7_1_EDX] & CPUID_7_1_EDX_AVX10) { > - x86_cpu_adjust_level(cpu, &env->cpuid_min_level, 0x24); > - } > + /* Advanced Vector Extensions 10 (AVX10) requires CPUID[0x24] */ > + if (env->features[FEAT_7_1_EDX] & CPUID_7_1_EDX_AVX10) { > + x86_cpu_adjust_level(cpu, &env->cpuid_min_level, 0x24); > + } > > - /* SVM requires CPUID[0x8000000A] */ > - if (env->features[FEAT_8000_0001_ECX] & CPUID_EXT3_SVM) { > - x86_cpu_adjust_level(cpu, &env->cpuid_min_xlevel, 0x8000000A); > - } > + /* SVM requires CPUID[0x8000000A] */ > + if (env->features[FEAT_8000_0001_ECX] & CPUID_EXT3_SVM) { > + x86_cpu_adjust_level(cpu, &env->cpuid_min_xlevel, 0x8000000A); > + } > > - /* SEV requires CPUID[0x8000001F] */ > - if (sev_enabled()) { > - x86_cpu_adjust_level(cpu, &env->cpuid_min_xlevel, 0x8000001F); > - } > + /* SEV requires CPUID[0x8000001F] */ > + if (sev_enabled()) { > + x86_cpu_adjust_level(cpu, &env->cpuid_min_xlevel, 0x8000001F); > + } > > - if (env->features[FEAT_8000_0021_EAX]) { > - x86_cpu_adjust_level(cpu, &env->cpuid_min_xlevel, 0x80000021); > - } > + if (env->features[FEAT_8000_0021_EAX]) { > + x86_cpu_adjust_level(cpu, &env->cpuid_min_xlevel, 0x80000021); > + } > > - /* SGX requires CPUID[0x12] for EPC enumeration */ > - if (env->features[FEAT_7_0_EBX] & CPUID_7_0_EBX_SGX) { > - x86_cpu_adjust_level(cpu, &env->cpuid_min_level, 0x12); > - } > + /* SGX requires CPUID[0x12] for EPC enumeration */ > + if (env->features[FEAT_7_0_EBX] & CPUID_7_0_EBX_SGX) { > + x86_cpu_adjust_level(cpu, &env->cpuid_min_level, 0x12); > } > > /* Set cpuid_*level* based on cpuid_min_*level, if not explicitly set */ > @@ -10010,7 +10008,6 @@ static const Property x86_cpu_properties[] = { > DEFINE_PROP_UINT32("min-xlevel2", X86CPU, env.cpuid_min_xlevel2, 0), > DEFINE_PROP_UINT8("avx10-version", X86CPU, env.avx10_version, 0), > DEFINE_PROP_UINT64("ucode-rev", X86CPU, ucode_rev, 0), > - DEFINE_PROP_BOOL("full-cpuid-auto-level", X86CPU, full_cpuid_auto_level, > true), > DEFINE_PROP_STRING("hv-vendor-id", X86CPU, hyperv_vendor), > DEFINE_PROP_BOOL("cpuid-0xb", X86CPU, enable_cpuid_0xb, true), > DEFINE_PROP_BOOL("x-vendor-cpuid-only", X86CPU, vendor_cpuid_only, true), > diff --git a/target/i386/cpu.h b/target/i386/cpu.h > index cee1f692a1c3..8c3eb86fa0c7 100644 > --- a/target/i386/cpu.h > +++ b/target/i386/cpu.h > @@ -2292,9 +2292,6 @@ struct ArchCPU { > /* Force to enable cpuid 0x1f */ > bool force_cpuid_0x1f; > > - /* Enable auto level-increase for all CPUID leaves */ > - bool full_cpuid_auto_level; > - > /* > * Compatibility bits for old machine types (PC machine v6.0 and older). > * Only advertise CPUID leaves defined by the vendor.
