On Thursday, December 24, 2015 03:01 AM, Florent Kermarrec wrote:
One thing we have to change is to reset the intermediate value of the
Converter between cycles (to have enable = 0 on chunks that have not
been received).

Since the problem of partially valid data is introduced by the Converter, I think the core feeding it (the message generator in my case) should not know anything about enable signals, and the Converter itself should create that enable signal and add it to its output layout.

I also think it is more appropriate to have the direct binary-coded "number of valid tokens" output, instead of encoding it as "consecutive ones". The DMA core would otherwise need to convert it back to binary in order to keep track of how many messages have been received.

When downconverting (message size > SDRAM size), that number can be one for the last chunk and zero otherwise. This way, the message-counting logic in the DMA core can be the same as in the SDRAM size > message size case.

What do you think?

Sebastien
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