Hi,
Unless there is a large transaction buffer and multitasking, it does not
make sense to do I2C in hardware. It is a slow protocol (400kHz clock
rate maximum) and as a result the CPU would wait for the hardware for a
large chunk of the time of every transaction. You're better off using a
simpler GPIO core and bitbanging.
So, adding a simple CSR interface is not very useful. This core was
designed to be driven by a hardware FSM.
Sébastien
_______________________________________________
M-Labs devel mailing list
https://ssl.serverraum.org/lists/listinfo/devel
