Hi Takeshi,

I've seen that you have included reboot support in the Linux kernel.
So far, it is not possible to reboot to the BIOS because it would try to re-
calibrate the SDRAM timings again and this would cause problems.

So I suggest that the BIOS is made "rebootable" by making it check if SDRAM is 
already up and skip initialization in this case, so that you can do a full 
system reboot from Linux by jumping at address 0.

Also, I have seen that you are working on a PS/2 driver. If you want your PS/2 
FPGA core to be included in the releases, send me a patch and I will review 
and merge it.
Your contribution to the hardware (Verilog source) must have a license 
compatible with eGPL (www.egpl.info) - even though I'm thinking about moving 
my code to GNU GPL v3 due to the lack of activity from the eGPL foundation.

I would like to thank you again for your contributions to the project and the 
quality of your work.

Regards,
Sébastien
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