The interrupt controller in LM32 is definitely edge-sensitive, so its
documentation is wrong:
(from lm32_interrupt.v):
(...)
input [interrupts-1:0] interrupt_n; // Interrupt pins, active-low
(...)
// Determine which interrupts are currently being asserted (active-low) or are
// already pending
assign asserted = ip | ~interrupt_n;
(...)
always @(posedge clk_i `CFG_RESET_SENSITIVITY)
(...)
ip <= asserted;
(...)
if (csr == `LM32_CSR_IP)
ip <= asserted & ~csr_write_data[interrupts-1:0];
(...)
I am also wondering why they use active low signals? From this design, they do
not seem to provide any architectural advantage, and only make using LM32 a
bit more complex...
Sébastien
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