Am Sunday 14 March 2010 21:02:50 schrieben Sie: > On Sunday 14 March 2010 17:41:46 Michael Walle wrote: > > Shouldn't the linux kernel mask the interrupt it is currently processing > > (in case of level sensitive interrupts)? > > I don't think so. When the CPU enters exception mode, the global interrupt > enable bit (IE.IE) is cleared and saved to IE.EIE. So, the interrupt > handler will not be run in a loop even if the interrupt line is kept > active. Then, once the exception has been serviced, the interrupt handler > executes the "eret" instruction which restores IE.IE from IE.EIE, globally > enabling interrupts again. Only at this point is the interrupt handler run > again if the interrupt line is still active (or the interrupt hasn't been > acked).
right, but if i get it correctly, linux enables the irqs (the IE bit) right after entering the ISR (unless the IRQF_DISABLED is set). This would imply that level sensitive interrups have to be masked. If not it leads to an infinite loop (in fact, i get that loop if i do not pulse the irq, but let it asserted). Also have a look at: handle_level_irq() at kernel/irq/chip.c (dunno why we use handle_simple_irq() instead of handle_level_irq()) -- wkr michael _______________________________________________ http://lists.milkymist.org/listinfo.cgi/devel-milkymist.org IRC: #milkym...@freenode Webchat: www.milkymist.org/irc.html Wiki: www.milkymist.org/wiki
