> As already told, I can send the eagle Files for my design. Another design > got in the way, so the design with XC6SLC45, DRAM, parallel Flash and > DP3865 1G Ethernet (like USRP) still awaits final design review and is > scheduled for production mid May till June.
Yes, please send, so we can compare and check how we connected the FPGA. How big are your files? Thanks, Sébastien _______________________________________________ http://lists.milkymist.org/listinfo.cgi/devel-milkymist.org IRC: #milkym...@freenode Webchat: www.milkymist.org/irc.html Wiki: www.milkymist.org/wiki
