Hi,

Congratz & thanks!! This is excellent news.

On Tuesday 01 June 2010 11:10:15 Adam Wang wrote:
> c) an extra item about Impedance test on trace simulation & implement. USD
>  188. this item is to make sure the results of Impendance[7]. Need to
>  introduce this more in wiki.

Does this report also include trace delays? This might come handy to pre-
calibrate the DDR SDRAM I/O and clocks.
(I'm not asking for trace delay measurements, but if you already have them, 
send them along as they could help. Just concentrate on the SMT assembly, if 
needed I can probably make these measurements myself anyway)

> The smt factory[5] agreed us that we can take pics & videos whatever I want.

Cool :)

> BTW, I need to update a high-quality bare PCB shots soon.

A little tip (that you might already know): putting them in a document scanner 
(the "flatbed" type) usually works well.

Sébastien
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