FYI. KTH Forum building is at Isafjordsgatan 39, Kista, Stockholm. ________________________________________ From: Mats Brorsson Sent: Saturday, June 05, 2010 7:33 AM To: [email protected]; [email protected]; '[email protected]' ([email protected]); multicore- [email protected] Cc: Sebastien Bourdeauducq; Artur Podobas; Ananya Muddukrishna Subject: Two master thesis presentations, June 8: VJ application on an FPGA and thermal-aware multicore scheduling
You are all cordially welcome to the following master thesis presentations next Tuesday afternoon, June 8. Both presentations will take place in room Gemini at KTH Forum building. Elevator C, level 8. Number 1: 15.00 Title: A Performance-driven SoC for Video Synthesis Author: Sébastien Bourdeauducq Opponent: Ananya Muddukrishna Abstract: Commercial system-on-chips with advanced graphics acceleration capabilities are becoming ubiquitous today. However, in contradiction with the open source idea, little is known about the details of their architecture and implementation, as they are usually covered by trade secrets. Fostered by the falling costs of high-density FPGAs, our thesis project encompasses researching, developing and implementing the key points of the architecture of an open source and comprehensive system-on-chip with competitive yet reasonable graphics capabilities. The chosen target application is the synthesis of visual effects similar to those produced by the popular MilkDrop visualization plug-in for Winamp. Our system-on-chip design consists principally of a custom bus infrastructure, a custom DDR SDRAM memory controller, a microprocessor core, and custom graphics accelerators for texture mapping and floating point processing. Our base microprocessor system is capable of running Linux (without MMU) and outperforms a Microblaze-based solution tested in similar conditions by a 15 to 35% increase in speed of execution. For our video synthesis application, our texture mapping accelerator achieves an average fill rate of 44 megapixels per second and our floating point processing unit provides in excess of 70 million floating point operations per second. Everything, including I/O peripherals (AC97 audio, Ethernet, RS232 UART, GPIO), is implemented on a Virtex-4 XC4VLX25 FPGA, where it utilizes about 80% of the resources. Finally, we have successfully developed an embedded video synthesis program that leverages the possibilities of our hardware architecture to permit the live rendering of many MilkDrop effects in 640x480 resolution at 30 frames per second. Number 2: 16:00 Title: Thermal-aware scheduling in OpenMP Author: Artur Podobas Opponent: Sébastien Bourdeauducq Abstract: Multi-core computer systems have widely been accepted as the future standard in computer architecture. Many simple processing cores bundled together on a single die have been shown more successful in terms of power consumption and execution performance compared to previous large and heavily pipelined uni-core systems. And as the chip dimensions decrease, temperature effects starts to become prominent. Elevated temperature gradients and hotspot on processors put an upper limit on both the execution performance and the life-time of the devices, leading to failures and eventually malfunction. Most work involved in software-based temperature management in multi-core system has been in the kernel-space, hidden from the user. This work hopes to change this, and show that it is possible to make user-level schedulers account for temperature changes occurring in the system. OpenMP is the current standard in parallel programming and was used to implement a scheduling policy that uses hardware feedback to effectively try to eliminate elevated temperature in the chip. The system itself was simulated and modeled using well-established simulators and models. The results were promising, showing a decrease in time spent above the critical temperature with up to 140 times in some benchmarks and a decreased power consumption in all the benchmarks as compared to the cilk and breadth- first scheduler. This alone should be encourage to more research in this area, to hopefully give rise to a future standard of user-level temperature control in parallel based schedulers. Mats Brorsson -- Professor of Computer Architecture http://web.ict.kth.se/~matsbror _______________________________________________ http://lists.milkymist.org/listinfo.cgi/devel-milkymist.org IRC: #milkym...@freenode Webchat: www.milkymist.org/irc.html Wiki: www.milkymist.org/wiki
