> Yes, just ground the video output signals going to the DAC in the > Verilog source. > S.
How do you avoid multiple drivers connected to a single signal doing this in verilog? Why not just use PULLDOWN in the UCF file?
signature.asc
Description: Digital signature
_______________________________________________ http://lists.milkymist.org/listinfo.cgi/devel-milkymist.org IRC: #milkymist@Freenode Twitter: www.twitter.com/milkymistvj Ideas? http://milkymist.uservoice.com
