On Wed, 5 Oct 2011 09:55:14 -0300, Werner Almesberger wrote:
Uwe Bonnes wrote:
In the schematic (page 7 of rc3_schematic.pdf), I don't see a
pull-up on
the JS28F256 CE0 pin and neither on we_n. Shoudn't these pullup help
too?
This sounds like a very good idea to me. Also Xilinx have 4.7 kOhm
pull-ups in their reference design in figure 2-20 on page 48 of
http://www.xilinx.com/support/documentation/user_guides/ug380.pdf
I think the FPGA should already have those internally (the same
pull-ups that make the LEDs go dimly lit when the FPGA is unconfigured).
But maybe there are glitches or something?
_______________________________________________
http://lists.milkymist.org/listinfo.cgi/devel-milkymist.org
IRC: #milkymist@Freenode
