Once the LEDs are in place, we need to decide what to do with
them. Here's a proposal for some simple indicator functions:

Device          LED function
                dark            lit             periodic blink  flashes (neg)
--------------- --------------- --------------- --------------- ---------------
USB             off/nothing plg plugged         overcurrent (1) activity
LED (stat)      off/booting     FPGA loaded     -               -
IR              idle            -               -               reception (2)
Audio in        muted/unused    used, silent    -               activity
Audio out       unused          used, silent    -               activity ?
Microphone      muted/unused    used, silent    -               activity 
DVI-I           no signal       signal          DCC error       -
DC in           no power/disabl power/enabled   -               -
Video in        unused          got sync        no sync         -
MIDI RX         unused          use (3)         -               activity (4)
MIDI TX         unused          use (3)         -               activity 
DMX RX          unused          use (3)         -               activity (4)
DMX TX          unused          use (3)         -               activity 

Possible usability enhancements that would need crossing several 
protocol layers:

(1) May be desirable to also indicate enumeration failure with blink.
(2) May be desirable to distinguish between seeing a signal and
    actually recognizing a message. 
(3) Indication that patch has requested access.
(4) Maybe indicate reception of usable message (e.g., wrong channel)
    with flash and reception of unusable message with a few periodic
    blinks. Or use different-length flashes.

I left the LED of the IR receiver off by default to avoid potential
interferences. We discussed that issue on #milkymist. It seems that
the various attenuation effects should pretty much eliminate the
risk of the LED upsetting IR reception, but better safe than sorry.

All this would be controlled by software. In case we hit something
performance-critical we could also add some smarts to the FPGA.

- Werner
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