Additionally, modify the tb_sie test bench to send a valid USB packet.
Signed-off-by: Michael Walle <mich...@walle.cc>
---
cores/softusb/test/Makefile | 12 +++-
cores/softusb/test/tb_crc.v | 120 +++++++++++++++++++++++++++++++++++++++++++
cores/softusb/test/tb_sie.v | 12 +++--
3 files changed, 137 insertions(+), 7 deletions(-)
create mode 100644 cores/softusb/test/tb_crc.v
diff --git a/cores/softusb/test/Makefile b/cores/softusb/test/Makefile
index a7f7868..fbe84af 100644
--- a/cores/softusb/test/Makefile
+++ b/cores/softusb/test/Makefile
@@ -33,10 +33,16 @@ sim-navre: fib.rom fibc.rom
isim-sie: runsim-sie
./runsim-sie
-runsim-sie: ../rtl/softusb_tx.v ../rtl/softusb_rx.v tb_sie.v
- iverilog -o runsim-sie ../rtl/softusb_tx.v ../rtl/softusb_rx.v tb_sie.v
+isim-crc: runsim-crc
+ ./runsim-crc
+
+runsim-sie: ../rtl/softusb_tx.v ../rtl/softusb_rx.v ../rtl/softusb_crc.v
tb_sie.v
+ iverilog -o runsim-sie ../rtl/softusb_tx.v ../rtl/softusb_rx.v
../rtl/softusb_crc.v tb_sie.v
+
+runsim-crc: ../rtl/softusb_crc.v tb_crc.v
+ iverilog -o runsim-crc ../rtl/softusb_crc.v tb_crc.v
clean:
- rm -f verilog.log trx.elf trx.bin trx.rom fib.elf fib.bin fib.rom
fibc.elf fibc.bin fibc.rom runsim softusb.vcd softusb_sie.vcd runsim-sie
+ rm -f verilog.log trx.elf trx.bin trx.rom fib.elf fib.bin fib.rom
fibc.elf fibc.bin fibc.rom runsim runsim-sie runsim-crc softusb.vcd
softusb_sie.vcd softusb_crc.vcd runsim-sie
.PHONY: clean sim sim-navre
diff --git a/cores/softusb/test/tb_crc.v b/cores/softusb/test/tb_crc.v
new file mode 100644
index 0000000..c980249
--- /dev/null
+++ b/cores/softusb/test/tb_crc.v
@@ -0,0 +1,120 @@
+/*
+ * Milkymist SoC
+ * Copyright (C) 2012 Michael Walle
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, version 3 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+`timescale 1 ns / 1 ps
+
+
+module tb_crc();
+
+reg usb_clk;
+initial usb_clk = 1'b0;
+always #10 usb_clk = ~usb_clk;
+
+reg crc_reset;
+reg crc_ce;
+reg data_in;
+
+task waitclock;
+begin
+ @(posedge usb_clk);
+ #1;
+end
+endtask
+
+task usb_token;
+input [63:0] data;
+input integer len;
+integer i;
+begin
+ crc_reset = 1'b1;
+ waitclock;
+ crc_reset = 1'b0;
+ waitclock;
+ waitclock;
+ for (i=0;i<len;i=i+1) begin
+ data_in = data[len-i-1];
+ crc_ce = 1'b1;
+ waitclock;
+ crc_ce = 1'b0;
+ waitclock;
+ end
+end
+endtask
+
+wire crc5_valid;
+wire crc16_valid;
+
+softusb_crc crc(
+ .usb_clk(usb_clk),
+
+ .crc_reset(crc_reset),
+ .crc_ce(crc_ce),
+ .data(data_in),
+
+ .crc5_valid(crc5_valid),
+ .crc16_valid(crc16_valid)
+);
+
+initial begin
+ $dumpfile("softusb_crc.vcd");
+ $dumpvars(0, crc);
+
+ crc_reset = 1'b1;
+ data_in = 1'b0;
+ crc_ce = 1'b0;
+ waitclock;
+ waitclock;
+
+ crc_reset = 1'b0;
+ #100;
+
+ /* this are examples from
+ * http://www.usb.org/developers/whitepapers/crcdes.pdf */
+ usb_token(64'h08F4, 16);
+ $display("crc5=0x%x", crc.crc5);
+ if(~crc5_valid)
+ $display(" ERROR: incorrect");
+ #100;
+ usb_token(64'hA8F7, 16);
+ $display("crc5=0x%x", crc.crc5);
+ if(~crc5_valid)
+ $display(" ERROR: incorrect");
+ #100;
+ usb_token(64'h0E4E, 16);
+ $display("crc5=0x%x", crc.crc5);
+ if(~crc5_valid)
+ $display(" ERROR: incorrect");
+ #100;
+ usb_token(64'h8017, 16);
+ $display("crc5=0x%x", crc.crc5);
+ if(~crc5_valid)
+ $display(" ERROR: incorrect");
+ #1000;
+ usb_token(64'h008040C0F75E, 48);
+ $display("crc16=0x%x", crc.crc16);
+ if(~crc16_valid)
+ $display(" ERROR: incorrect");
+ #100;
+ usb_token(64'hC4A2E6917038, 48);
+ $display("crc16=0x%x", crc.crc16);
+ if(~crc16_valid)
+ $display(" ERROR: incorrect");
+ #100;
+ $finish;
+end
+
+endmodule
diff --git a/cores/softusb/test/tb_sie.v b/cores/softusb/test/tb_sie.v
index ed7f42b..7ef381e 100644
--- a/cores/softusb/test/tb_sie.v
+++ b/cores/softusb/test/tb_sie.v
@@ -93,11 +93,15 @@ initial begin
rxreset = 1'b0;
tx_data = 8'h80;
tx_valid = 1'b1;
- #3000;
- tx_data = 8'h2d;
- #9000;
+ #5000;
+ tx_data = 8'ha5;
+ #5000;
+ tx_data = 8'h8a;
+ #5000;
+ tx_data = 8'h68;
+ #5000;
tx_valid = 1'b0;
- #40000;
+ #10000;
$finish;
end
--
1.7.2.5
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