> About adding CSRs to LM32: there is really only 5 bits available for CSR IDs, > it's too bad but > adding CSR
I meant that CSR31 (remains unused, I believe) is to indicate 0-padded LSB field have extended CSR (SPR in PPC term). > Except those, indeed I would do something like that :) > Which looks like MIPS fast tlb miss I saw in the really good book "see MIPS > Run" (Linux edition) G'd to hear that you've read the book. The points the author emphasises is rarely understood I think. As the linear PTE array in kernel space is also subject to ASID, switching PTE array for a new process also done by changing ASID. Would be better if the authour also mentions that O(1) lookup scheme was used (invented?) by VAX VMS. MIPS architects just stole the approach with ASID magic salt. -nisimura _______________________________________________ Devel mailing list Devel@lists.milkymist.org https://ssl.serverraum.org/lists/listinfo/devel
