Index: opal/asm/base/IA64.asm
===================================================================
--- opal/asm/base/IA64.asm	(revision 30400)
+++ opal/asm/base/IA64.asm	(working copy)
@@ -73,8 +73,6 @@
 	mov ar.ccv=r33;;
 	cmpxchg8.acq r32=[r32],r34,ar.ccv
 	;;
-	sxt4 r32 = r32
-	;;
 	cmp.eq p6, p7 = r33, r32
 	;;
 	(p6) addl r8 = 1, r0
@@ -91,8 +89,6 @@
 	mov ar.ccv=r33;;
 	cmpxchg8.rel r32=[r32],r34,ar.ccv
 	;;
-	sxt4 r32 = r32
-	;;
 	cmp.eq p6, p7 = r33, r32
 	;;
 	(p6) addl r8 = 1, r0
Index: opal/include/opal/sys/ia64/atomic.h
===================================================================
--- opal/include/opal/sys/ia64/atomic.h	(revision 30400)
+++ opal/include/opal/sys/ia64/atomic.h	(working copy)
@@ -119,7 +119,7 @@
     __asm__ __volatile__ ("cmpxchg8.acq %0=[%1],%2,ar.ccv":
                   "=r"(ret) : "r"(addr), "r"(newval) : "memory");
 
-    return ((int32_t)ret == oldval);
+    return (ret == oldval);
 }
 
 
@@ -132,7 +132,7 @@
     __asm__ __volatile__ ("cmpxchg8.rel %0=[%1],%2,ar.ccv":
                   "=r"(ret) : "r"(addr), "r"(newval) : "memory");
 
-    return ((int32_t)ret == oldval);
+    return (ret == oldval);
 }
 
 #endif /* OMPI_GCC_INLINE_ASSEMBLY */