Branch: refs/heads/master
Home: https://github.com/OpenSIPS/opensips
Commit: efc8d6cc2a6057b86685911b725a22bd82766b92
https://github.com/OpenSIPS/opensips/commit/efc8d6cc2a6057b86685911b725a22bd82766b92
Author: Razvan Crainea <[email protected]>
Date: 2019-06-20 (Thu, 20 Jun 2019)
Changed paths:
M modules/acc/acc.c
M modules/acc/acc_logic.c
M modules/acc/acc_mod.c
Log Message:
-----------
acc: move ctx in dlg ctx, instead of dlg val
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