From: Jan Dakinevich <[email protected]> Previously if no PMU counters were exposed to guest, KVM skipped whole remaining PMU-related initialisation, including filling of LBR-related information. It is wrong, since LBR support doesn't depend on existence of PMU counters.
https://jira.sw.ru/browse/PSBM-94429 Signed-off-by: Jan Dakinevich <[email protected]> https://jira.sw.ru/browse/PSBM-127846 (cherry-picked from vz7 commit 39b4be609936 ("KVM: x86/vPMU: handle access to LBR stack regardless of PMU counters presence")) Fixes: 1fb36a7c3b57 ("KVM: x86/vPMU: Ignore access to LBR-related MSRs") Signed-off-by: Pavel Tikhomirov <[email protected]> --- arch/x86/kvm/vmx/pmu_intel.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c index 0df709f5b856..ccfe7ce4b78f 100644 --- a/arch/x86/kvm/vmx/pmu_intel.c +++ b/arch/x86/kvm/vmx/pmu_intel.c @@ -333,6 +333,11 @@ static void intel_pmu_refresh(struct kvm_vcpu *vcpu) pmu->version = 0; pmu->reserved_bits = 0xffffffff00200000ull; + entry = kvm_find_cpuid_entry(vcpu, 1, 0); + if (entry) + intel_pmu_lbr_fill(&pmu->lbr, + x86_family(entry->eax), x86_model(entry->eax)); + entry = kvm_find_cpuid_entry(vcpu, 0xa, 0); if (!entry) return; @@ -383,11 +388,6 @@ static void intel_pmu_refresh(struct kvm_vcpu *vcpu) INTEL_PMC_MAX_GENERIC, pmu->nr_arch_fixed_counters); nested_vmx_pmu_entry_exit_ctls_update(vcpu); - - entry = kvm_find_cpuid_entry(vcpu, 1, 0); - if (entry) - intel_pmu_lbr_fill(&pmu->lbr, - x86_family(entry->eax), x86_model(entry->eax)); } static void intel_pmu_init(struct kvm_vcpu *vcpu) -- 2.31.1 _______________________________________________ Devel mailing list [email protected] https://lists.openvz.org/mailman/listinfo/devel
