From: Ankit Soni <[email protected]>

With concurrent TLB invalidations, completion wait randomly gets timed out
because cmd_sem_val was incremented outside the IOMMU spinlock, allowing
CMD_COMPL_WAIT commands to be queued out of sequence and breaking the
ordering assumption in wait_on_sem().
Move the cmd_sem_val increment under iommu->lock so completion sequence
allocation is serialized with command queuing.
And remove the unnecessary return.

Fixes: d2a0cac10597 ("iommu/amd: move wait_on_sem() out of spinlock")

Tested-by: Srikanth Aithal <[email protected]>
Reported-by: Srikanth Aithal <[email protected]>
Signed-off-by: Ankit Soni <[email protected]>
Reviewed-by: Vasant Hegde <[email protected]>
Signed-off-by: Joerg Roedel <[email protected]>
(cherry picked from commit 9e249c48412828e807afddc21527eb734dc9bd3d)

Context adjusted: vz10 does not have cmd_sem_paddr in struct amd_iommu.

https://virtuozzo.atlassian.net/browse/VSTOR-154424
Feature: fix ms/iommu

Signed-off-by: Denis V. Lunev <[email protected]>
---
 drivers/iommu/amd/amd_iommu_types.h |  2 +-
 drivers/iommu/amd/init.c            |  2 +-
 drivers/iommu/amd/iommu.c           | 18 ++++++++++++------
 3 files changed, 14 insertions(+), 8 deletions(-)

diff --git a/drivers/iommu/amd/amd_iommu_types.h 
b/drivers/iommu/amd/amd_iommu_types.h
index 95f63c5f6159..05a54f8f0434 100644
--- a/drivers/iommu/amd/amd_iommu_types.h
+++ b/drivers/iommu/amd/amd_iommu_types.h
@@ -791,7 +791,7 @@ struct amd_iommu {
 
        u32 flags;
        volatile u64 *cmd_sem;
-       atomic64_t cmd_sem_val;
+       u64 cmd_sem_val;
 
 #ifdef CONFIG_AMD_IOMMU_DEBUGFS
        /* DebugFS Info */
diff --git a/drivers/iommu/amd/init.c b/drivers/iommu/amd/init.c
index 07f1159a5e28..36ea9ce775ec 100644
--- a/drivers/iommu/amd/init.c
+++ b/drivers/iommu/amd/init.c
@@ -1749,7 +1749,7 @@ static int __init init_iommu_one(struct amd_iommu *iommu, 
struct ivhd_header *h,
        iommu->pci_seg = pci_seg;
 
        raw_spin_lock_init(&iommu->lock);
-       atomic64_set(&iommu->cmd_sem_val, 0);
+       iommu->cmd_sem_val = 0;
 
        /* Add IOMMU to internal data structures */
        list_add_tail(&iommu->list, &amd_iommu_list);
diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c
index 00608e55e70c..373596fa07c0 100644
--- a/drivers/iommu/amd/iommu.c
+++ b/drivers/iommu/amd/iommu.c
@@ -1391,6 +1391,12 @@ static int iommu_queue_command(struct amd_iommu *iommu, 
struct iommu_cmd *cmd)
        return iommu_queue_command_sync(iommu, cmd, true);
 }
 
+static u64 get_cmdsem_val(struct amd_iommu *iommu)
+{
+       lockdep_assert_held(&iommu->lock);
+       return ++iommu->cmd_sem_val;
+}
+
 /*
  * This function queues a completion wait command into the command
  * buffer of an IOMMU
@@ -1405,11 +1411,11 @@ static int iommu_completion_wait(struct amd_iommu 
*iommu)
        if (!iommu->need_sync)
                return 0;
 
-       data = atomic64_inc_return(&iommu->cmd_sem_val);
-       build_completion_wait(&cmd, iommu, data);
-
        raw_spin_lock_irqsave(&iommu->lock, flags);
 
+       data = get_cmdsem_val(iommu);
+       build_completion_wait(&cmd, iommu, data);
+
        ret = __iommu_queue_command_sync(iommu, &cmd, false);
        raw_spin_unlock_irqrestore(&iommu->lock, flags);
 
@@ -3092,10 +3098,11 @@ static void iommu_flush_irt_and_complete(struct 
amd_iommu *iommu, u16 devid)
                return;
 
        build_inv_irt(&cmd, devid);
-       data = atomic64_inc_return(&iommu->cmd_sem_val);
-       build_completion_wait(&cmd2, iommu, data);
 
        raw_spin_lock_irqsave(&iommu->lock, flags);
+       data = get_cmdsem_val(iommu);
+       build_completion_wait(&cmd2, iommu, data);
+
        ret = __iommu_queue_command_sync(iommu, &cmd, true);
        if (ret)
                goto out_err;
@@ -3109,7 +3116,6 @@ static void iommu_flush_irt_and_complete(struct amd_iommu 
*iommu, u16 devid)
 
 out_err:
        raw_spin_unlock_irqrestore(&iommu->lock, flags);
-       return;
 }
 
 static inline u8 iommu_get_int_tablen(struct iommu_dev_data *dev_data)
-- 
2.53.0

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